Agentic Platform AI Research Engineer

AIDAChip Inc; Seattle (WA); Hybrid; USD 180,000 - 240,000; Full time

Job summary

AIDAChip is the Alignment OS for AI-native silicon engineering teams — the first AI platform built for chip design teams, not just individuals. You will own the engine that turns expert agent designs into production agents and you will rigorously test performance to ensure reliability.

You will drive both platform engineering and evaluation research, partnering with chip-design experts to ship and measure systems that operate at scale with strong cost, latency, and reliability discipline.

Qualifications

• Experience shipping multi-agent/LLM systems to production.
• Strong backend engineering with scalability focus.
• Rigorous eval design and statistical testing.
• Ability to partner with domain experts and ship.

Responsibilities

• Build the agent factory (harness, packaging, tool wiring) so a new role agent ships in weeks, not months
• Design and ship orchestration agents (workflow coordination, verification orchestration, cross-discipline handoff)
• Hold the fleet efficiency bar: minimize turns/task and agent token overhead, keep critical paths sub-second
• Design the human-eval program with chip-design experts; build auto-evaluation that reaches parity with human judges
• Research agent consistency: variance across repeated runs, drift across model swaps
• Instrument the experience signals that gate the product: task completion, abandonment, HITL integrity
• Pair daily with chip-design domain experts: they define what each agent must do and how it's judged; you ship it and measure it

Skills

Multi-agent systems

LLM orchestration

Back-end engineering

Evaluation methodology

Production CI gates

Job description

AIDAChip is the Alignment OS for AI-native silicon engineering teams — the first AI platform built for chip design teams, not just individuals. You will own the engine that turns expert agent designs into production agents and you will rigorously test performance to ensure reliability.

You will drive both platform engineering and evaluation research, partnering with chip-design experts to ship and measure systems that operate at scale with strong cost, latency, and reliability discipline.