Technology Development IC Packaging Design Senior/Engineer AST

Ast Sg; Singapore; On-site; SGD 180,000 - 240,000; Full time

Benefits offered by this job

Competitive compensation and benefits

Opportunities for professional develop

Collaborative and innovative环境

Cutting-edge projects

Job summary

Advanced Substrate Technologies Pte. Ltd. (AST) seeks an experienced Package Architecture and Design Engineer to lead advanced packaging initiatives in Singapore.

You will co-design, optimize stacks, and ensure signal integrity, power integrity, and manufacturability in tight collaboration with multiple engineering teams. The role requires a strong background in IC packaging, proficiency with Cadence Allegro APD Release 25.1 and ANSYS tools, and a track record delivering NPI through high-volume

Qualifications

• BS/MS/PhD in Electrical Engineering (Preferred) or related field.
• Hands-on experience in advanced IC packaging for silicon nodes.
• Expertise in substrate design, SI/PI principles, thermal management, and high-speed IO packaging.
• Proficiency with Cadence Allegro APD Release 25.1/SIP or comparable packaging design tools.

Responsibilities

• Collaborate with Design, PCB Layout, Product Engineering, Process Engineering, Mechanical Engineering, and Manufacturing teams to optimize design performance.
• Co-optimize package stack-up, layer count, escape routing, BGA pattern, and power integrity architecture aligned to system and manufacturing requirements, using Cadence APD version Release 25.1
• Interpret SI/PI parameters (RL, IL, NEXT/FEXT, etc.) to drive signal integrity optimization.
• Provide design guidelines and recommendations to improve electrical performance and manufacturability.
• Review and monitor first article development results in collaboration with relevant divisions, focusing on high volume manufacturing.

Skills

Cross-functional leadership

Communication skills

Problem solving

Customer-facing skills

Education

BS/MS/PhD in Electrical Engineering or related

Tools

Cadence Allegro APD Release 25.1

ANSYS HFSS

ANSYS SI wave

ANSYS Mechanical (warpage)

Job description

About Advanced Substrate Technologies Pte. Ltd.

We are a Singapore-based subsidiary of TOPPAN Holdings Inc., a Japanese pioneer in printing technologies and a leading supplier of high-quality Flip Chip Ball Grid Array (FC-BGA) substrates. We are the first factory in Singapore to pioneer the manufacturing of high-end FC-BGA substrates used in cutting-edge semiconductor products such as network switches and artificial intelligence (AI)/machine learning (ML) devices.

Additionally, our facility will conduct research and development (R&D) aimed at advancing substrate technologies to meet the evolving performance requirements of future products in these domains. Broadcom Inc., a global technology leader specializing in semiconductor design, enterprise software, and security solutions, is also actively supporting the establishment of this state-of-the-art manufacturing facility in Singapore.

Our Research & Development

Do you thrive on developing groundbreaking technologies that lead to amazing new products? Are you meticulous and committed to excellence, always aiming for extraordinary results? Come see what you can achieve with AST R&D team! We believe that new ideas swiftly become remarkable products. With your passion and dedication, there’s no telling the impact you’ll make.

Company Overview

Our AST R&D team is on a mission to transform AI and develop groundbreaking hardware. We’re creating innovative solutions for tighter, quicker, and more dependable integration of processing and memory, moving beyond the limitations of current substrate technologies. We leverage cutting-edge semiconductor processing technologies, including Chemical Mechanical Planarization, to produce high-performance substrates with 10x increase in interconnect density, paving the way for packages with up to a trillion transistors.

Job Responsibilities

Package Architecture, Co-Design & Optimization

• Work closely with Package Design, PCB Layout, Product Engineering, Process Engineering, Mechanical Engineering, and Manufacturing teams to optimize design performance.
• Co-optimize package stack-up, layer count, escape routing, BGA pattern, and power integrity architecture aligned to system and manufacturing requirements, using Cadence APD version Release 25.1
• Interpret SI/PI parameters (RL, IL, NEXT/FEXT, etc.) to drive signal integrity optimization.
• Provide design guidelines and recommendations to improve electrical performance and manufacturability.
• Review and monitor first article development results in collaboration with relevant divisions, focusing on high volume manufacturing.

Package Design & Integration

• Collaborate with SI/PI simulation teams to optimize substrate designs and ensure successful electrical performance sign-off prior to product release.
• Ensure package designs meet SI/PI, mechanical, high-power thermal and reliability targets.
• Define and refine DFM and design rules for advanced packaging technologies.
• Drive implementation, optimization, and HVM qualification of new package / assembly technologies.

Technical Skills

Strong experience in one or more of the following tools:

• Cadence Allegro Package Designer version Release 25.1
• ANSYS HFSS
• ANSYS SI wave
• ANSYS Mechanical (warpage)

Perform any other ad-hoc duties as assigned by the Manager, as required to support the team and organizational goals.

Job Requirements

Professional Qualifications:

• Bachelors and 8+ years or Masters degree and 6+ years or PhD and 3+ years of related experience.
• BS/MS/PhD in Electrical Engineering (Preferred), Mechanical Engineering, Materials Science, or related field.
• Extensive hands‑on experience in advanced IC packaging for advanced silicon nodes.
• Expertise in substrate design, SI/PI principles, thermal management, and high-speed IO packaging.
• Strong understanding of high layer count, large body, flip chip BGA packaging technology.
• Proficiency in Cadence Allegro APD Release 25.1/SIP or comparable packaging design tools.
• Experience working with global OSATs and substrate material suppliers.
• Proven ability to drive NPI through HVM with strong cross-functional leadership.
• Excellent communication, documentation, and customer-facing skills.
  

Location & Commitments

• Premises located in 9 Pesawat Drive, Singapore 619607
• Permanent, full-time role working 40 hours per week

Why Join Us

• Work on cutting-edge projects in a growing field.
• Collaborative and innovative environment.
• Competitive compensation and benefits.
• Opportunities for professional development.

Closing Statement

AST is dedicated to creating a workplace that is diverse, equitable, and inclusive, where every employee feels appreciated, respected, and empowered to share their unique perspectives.