Staff Silicon Design Engineer

XILINX ASIA PACIFIC PTE. LTD.; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

AMD is seeking a seasoned SoC verification engineer to plan, develop, and execute the verification of next-gen ASIC and FPGA SoCs. You will work with distributed teams across sites and time zones to ensure defect-free designs.

The role requires strong SystemVerilog/UVM skills, SoC architecture understanding, and experience building verification environments. The position is based in Singapore with a collaborative, global team.

Qualifications

• Bachelor's or master's degree in Computer or Electrical Engineering.
• Strong grasp of SoC/ASIC/FPGA verification methodologies.
• Hands-on SystemVerilog and UVM experience is required.

Responsibilities

• Verify next-generation ASIC and FPGA SoCs as part of a distributed team.
• Develop test plans, create testbenches, and ensure coverage closure.
• Execute regression testing and contribute to verification infrastructure.
• Develop directed and random tests; debug failures with RTL/firmware teams.
• Review coverage metrics and adjust tests to achieve goals.

Skills

SoC verification

IP-level FPGA/ASIC verification

SoC architecture

Verilog/SystemVerilog

C/C++

Python/Perl scripting

SystemVerilog/UVM

Verification testbenches

Education

Bachelor’s or Master’s in Computer/Electrical Engineering

Tools

SystemVerilog

UVM

Verilog

Python/Perl

Job description

THE ROLE:

You will plan, develop, and execute the SoC verification of new and existing features for AMD’s ASIC and FPGA SoCs, ensuring there are no bugs in the final design.

THE PERSON:

You have a passion fornext-generationFPGAand ASIC design verification. You are a team player with excellent communication skills and experience collaborating with engineers across different sites and time zones. You possess strong analytical and problem-solving abilities, and you're eager to learn and take on challenges.

KEY RESPONSIBILITIES:

• Work as a member of a geographically distributed SoC verification team to verify next-generation ASIC and FPGA SoCs.
• Collaborate with design , software and architecture teams to verify SoC design under test.
• Develop SoC testplans, implement testbenches, create testcases, and ensure functional coverage closure.
• Handle regression testing and contribute to verification infrastructure development.
• Develop both directed and random verification tests.
• Debug test failures, identify root causes, and work with RTL and firmware engineers to resolve design defects and test issues.
• Review functional and code coverage metrics, modify or add tests or constrain random tests to meet coverage requirements

PREFERRED EXPERIENCE:

• Proficient in SoC and IP-level FPGA and ASIC verification.
• Strong understanding of SoC architecture.
• Proficient in Verilog/SystemVerilog, C/C++, and scripting languages such as Perl or Python.
• Hands-on experience with SystemVerilog and UVM is mandatory.
• Experience in developing UVM-based verification testbenches, processes, and flows.
• Solid understanding of design flow, verification methodology, and general computational logic design and verification

ACADEMIC CREDENTIALS:

• Relevant years of experience with Bachelor’s degree or Master’s degree in Computer Engineering or Electrical Engineering.

LOCATION:

Singapore