Senior Yield Engineer - Semiconductor Devices

Systems on Silicon Manufacturing Company Pte Ltd (SSMC); Singapore; On-site; SGD 100,440 - 167,400; Full time

Job summary

SSMC in Singapore is seeking an experienced Yield Engineer to drive 1st time silicon yield, identify yield limiters across product, test and fab processes, and serve as a technical interface with business lines and customers. You will lead pre-tapeout risk assessments, perform fault analyses, and work with Mother Fab on DFx issues, aiming to eliminate yield risks and improve quality and reliability.

Candidates typically have a degree in Electrical/Physics and 2–8 years in fabrication, yield

Qualifications

• Master/bachelor’s degree in electrical / electronic engineering or physics.
• 2–8 years product and/or test engineering, failure analysis or process-integration experience.
• Experience in Fab process, yield engineering or design is an added advantage.
• In-depth knowledge of semiconductor device physics, electrical & electronics fundamentals & wafer fabrication processes.
• Strong analytical & problem-solving skills.
• Good interpersonal and communication skills.

Responsibilities

• Ensuring 1st time yielding silicon, benchmark D0 for baseline and products.
• Identify & resolve Product, Test & Fab-Process related yield limiters in shortest time possible.
• Technical interface with Business Lines/customers
• Driver for yield improvement
• Resolve product yield, quality and reliability issues
• Perform pre-tapeout risk assessment and communicate with Business line/Fab on the necessary actions to eliminate/minimize the risk.
• Work with Customers/Mother Fab on the DfM related issue.
• Conduct product yield analyses to identify root cause of wafer sort and final test failures
• Set up fault diagnostic capabilities for yield improvement
• Work with Business line/customers on product low yield disposition
• Perform electrical and physical failure analysis to isolate fail location
• Drive the yield improvement task force.

Skills

Analytical skills

Problem solving

Communication

Interpersonal skills

Electrical engineering fundamentals

Wafer fabrication knowledge

Experience in Fab process

Yield engineering

Education

Master's or Bachelor's in Electrical/Electronic Engineering or Physics

Job description

SSMC in Singapore is seeking an experienced Yield Engineer to drive 1st time silicon yield, identify yield limiters across product, test and fab processes, and serve as a technical interface with business lines and customers. You will lead pre-tapeout risk assessments, perform fault analyses, and work with Mother Fab on DFx issues, aiming to eliminate yield risks and improve quality and reliability.

Candidates typically have a degree in Electrical/Physics and 2–8 years in fabrication, yield