Senior SoC Verification Engineer - AI/Memory Tech

TETRAMEM INC; Singapore; On-site; SGD 80,000 - 180,000; Full time

Job summary

TetraMem is redefining AI computing with memory-centric design and world-record RRAM technology. We seek a senior verification engineer to lead test planning, build verification infrastructure, and drive coverage for SoC designs, including RTL and post-silicon validation.

You will collaborate with design teams, mentor junior engineers, and contribute to scalable verification methodologies in a startup environment.

Qualifications

• MS with 8+ years of relevant experience or PhD (with 3+ years) in Electrical Engineering, Computer Engineering, Computer Science or related degree.
• In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology.
• Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification.
• Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.

Responsibilities

• Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification
• Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance
• Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels
• Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out
• Work with design engineers to debug and identify root causes of simulation failure
• Support test engineers for post-silicon validation
• Mentor and coach team members and junior engineers. Drive verification efficiency

Skills

UVM/OVM verification

Semiformal verification

Assertion-based verification

Hardware/software co-verification

Education

MS or PhD in Electrical/Computer Engineering or Computer Science

Tools

Verilog

SystemVerilog

Python

Perl

TCL

Shell scripting

C/C++

SystemC

Job description

TetraMem is redefining AI computing with memory-centric design and world-record RRAM technology. We seek a senior verification engineer to lead test planning, build verification infrastructure, and drive coverage for SoC designs, including RTL and post-silicon validation.

You will collaborate with design teams, mentor junior engineers, and contribute to scalable verification methodologies in a startup environment.