Senior High-Speed SAR ADC IC Design Engineer

Brightecs Innovation Pte Ltd; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Brightecs Innovation Pte. Ltd. (BIP) in Singapore seeks an experienced analog/mixed-signal design engineer to lead high-speed SAR ADC development for RF transceivers and data converters.

You will optimize critical blocks, model parasitics, and collaborate with layout and systems teams to ensure silicon performance and reliability. The role requires 8+ years in semiconductor design, strong EDA skills, and a deep grasp of ADC fundamentals.

Qualifications

• With more than 8 years relevant experience in similar field in semiconductor industry.
• Proficiency in EDA tools: Cadence Virtuoso, Spectre, HSPICE, MATLAB/Python for modeling.
• Deep understanding of ADC fundamentals: sampling theory, quantization noise, metastability.
• Experience with high-speed challenges: clock distribution, comparator offset cancellation, charge injection.
• Familiarity with mixed-signal verification (AMS, Verilog-A).

Responsibilities

• Design high-speed (>100MS/s) SAR ADCs for applications like 5G, radar, and data converters.
• Optimize critical blocks: capacitor DAC arrays, high-speed comparators, bootstrapped switches, and digital control logic.
• Achieve target specifications: ENOB, SFDR, and power efficiency (FOM < 10 fJ/step).
• Mitigate nonlinearity via capacitor matching techniques (common-centroid, dummy units).
• Reduce kickback noise, clock jitter, and metastability in comparators.
• Develop calibration algorithms (e.g., background LMS for capacitor mismatch).
• Model parasitics, device mismatch, and PVT variations; collaborate with layout teams.
• Develop test plans for lab characterization; post-silicon validation; support ATE programs.

Skills

High-speed ADC design

Noise & jitter handling

AMS/Verilog-A modeling

Tools

Cadence Virtuoso

Spectre

HSPICE

MATLAB/Python

Job description

Brightecs Innovation Pte. Ltd. (BIP) in Singapore seeks an experienced analog/mixed-signal design engineer to lead high-speed SAR ADC development for RF transceivers and data converters.

You will optimize critical blocks, model parasitics, and collaborate with layout and systems teams to ensure silicon performance and reliability. The role requires 8+ years in semiconductor design, strong EDA skills, and a deep grasp of ADC fundamentals.