Senior FPGA Acceleration Engineer

STARRY RECRUITMENT PTE. LTD.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

STARRY RECRUITMENT PTE. LTD. seeks an experienced FPGA Hardware Acceleration Engineer to design, implement, and deploy high‑performance compute pipelines on AMD Versal AI Edge and other FPGA platforms.

You will oversee the end‑to‑end pipeline from RTL/HLS development through synthesis, timing closure, and board bring‑up, collaborating with AI researchers and embedded software engineers to deliver deterministic, low‑latency hardware acceleration.

Qualifications

• Master's degree or above in Electrical/Electronic Engineering, Computer Engineering, Computer Science, or related field.
• Hands-on experience taking FPGA designs through RTL/HLS, simulation, synthesis, implementation, and on-board validation.
• Strong programming and hardware design skills in Verilog/SystemVerilog, VHDL, or C/C++ HLS.
• Practical experience with AMD Vivado/Vitis or equivalent FPGA development tools.
• Solid understanding of FPGA architecture, pipelining, memory hierarchy, and hardware optimization.
• Strong knowledge of AXI4/AXI-Stream and high-performance data movement architectures.
• Experience with DMA, PCIe, DDR4/LPDDR, or other high-speed memory and I/O interfaces.
• Experience with hardware debugging, board bring-up, and timing closure.

Responsibilities

• Design and implement custom FPGA compute engines and high-throughput streaming data paths using Verilog/SystemVerilog or C/C++ HLS.
• Develop and optimize memory and data-transfer interfaces, including AXI4, AXI-Stream, DMA, DDR4/LPDDR, and related architectures.
• Perform logic synthesis, place-and-route, timing analysis, and timing closure using AMD Vivado, Vitis, and Vitis AI.
• Bring up and validate FPGA designs on physical evaluation boards and hardware-in-the-loop test environments.
• Debug hardware issues using logic analyzers and on-chip debugging tools.
• Integrate FPGA acceleration kernels with ARM-based host processors and embedded software stacks.
• Optimize hardware architectures for throughput, latency, resource utilization, memory bandwidth, and deterministic execution.
• Collaborate with AI/ML researchers and software engineers to map computational workloads onto FPGA-based acceleration platforms.

Skills

Verilog/SystemVerilog

VHDL

C/C++ HLS

FPGA architecture

AXI4/AXI-Stream

DMA/PCIe interfaces

HDL debugging

Education

Master's degree or above in Electrical/Electronic Engineering, Computer Engineering, Computer Science, or related field

Tools

AMD Vivado

Vitis

Vitis AI

Job description

STARRY RECRUITMENT PTE. LTD. seeks an experienced FPGA Hardware Acceleration Engineer to design, implement, and deploy high‑performance compute pipelines on AMD Versal AI Edge and other FPGA platforms.

You will oversee the end‑to‑end pipeline from RTL/HLS development through synthesis, timing closure, and board bring‑up, collaborating with AI researchers and embedded software engineers to deliver deterministic, low‑latency hardware acceleration.