Semiconductor Engineer (High-Speed Interfaces / Hardware Solutions)

Marquee Semiconductor; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Marquee Semiconductor Inc. seeks an experienced Semiconductor Engineer to lead high-speed hardware design and system-level architecture for global customers.

You will own architecture definition through bring-up of PCIe Gen5/Gen6, NVMe, SerDes, and FPGA/SoC platforms, and collaborate across hardware, FPGA, and software teams. Responsibilities include delivering end-to-end designs, conducting SI/PI/thermal analysis, and supporting pre-sales with technical proposals.

Qualifications

• Experience in high-speed digital hardware design for semiconductor/test platforms.
• Deep knowledge of PCIe Gen5/6, SerDes, SI/PI, and power integrity.
• Proficient with EDA tools and FPGA toolchains for board bring-up.
• Ability to translate customer requirements into system solutions and proposals.

Responsibilities

• Architect and deliver high-speed hardware solutions including PCIe Gen5/Gen6 CEM add-in cards and SBCs.
• Perform end-to-end design: architecture, schematic capture, layout guidelines, SI/PI/thermal analysis.
• Lead signal and power integrity work: S-parameter simulation, eye diagrams, jitter analysis.
• Design and validate systems using PCIe, NVMe, 10/40/100GbE, USB, SATA, DDR4/LPDDR4, HBM.
• Collaborate across hardware, FPGA/RTL, firmware, and software teams.
• Support pre-sales and proposal activities.

Skills

High-speed HW design

Signal integrity

Power integrity

System-level architecture

Pre-sales support

Technical leadership

Customer engagement

Feasibility studies

Education

Diploma or Bachelor's in Electronics & Communication Engineering

Tools

Keysight ADS

HyperLynx

Cadence Allegro

OrCAD

Mentor Xpedition

Xilinx Vivado

Job description

We are seeking an experienced Semiconductor Engineerwith deep expertise in high-speed hardware design, signal/power integrity, andsystem-level architecture. The role bridges hands-on engineering with technicalsolution architecture and customer-facing activities, supporting semiconductor,memory, test & measurement, and embedded computing customers globally.

You will own architecture definition throughbring-up and validation of high-speed boards and systems (PCIe Gen5/6, NVMe,SerDes, FPGA/SoC platforms), contribute to design wins, and support technicalpre-sales and proposal activities.

Key Responsibilities

• Architect and deliver high-speed hardware solutions including PCIe Gen5/Gen6 CEM add-in cards, slot interposers with embedded FPGA, NVMe/SSD protocol-test platforms, and multi-variant Open VPX / VNX+ Single Board Computers (SBCs).
• Perform end-to-end product/system design: architecture definition, component selection, schematic capture, low-loss stackup (e.g., Megtron 6), layout guidelines, SI/PI/thermal analysis, board bring-up, characterization, and system integration.
• Execute signal and power integrity work: S-parameter simulation, channel-loss budgeting & equalization, eye/jitter analysis (RI/DJ), CTLE/DFE & de-emphasis, PCB characterization up to 16 GHz Nyquist.
• Design and validate systems using high-speed interfaces (PCIe Gen5/6 at 64 GT/s PAM4 / 32 Gbps NRZ, NVMe, 10/40/100GbE, USB, SATA, DDR4/LPDDR4, HBM) and protocols (PCIe, ARINC 818, MIL-STD-1553B, ARINC 429, etc.).
• Work with FPGA/SoC platforms (AMD Ultrascale/Ultrascale+/Versal, Intel/Altera Agilex, 7-Series, Intel Xeon D/E, Atom, NXP i.MX8) including platform understanding, RTL IP awareness, programming/booting, firmware/BSP/OS bring-up, and HW-FPGA-software integration.
• Lead or contribute to feasibility studies, technical proposals (SOW/RFP), requirement capture & translation, solution positioning, competitive differentiation, and design-win generation for semiconductor, memory, and test & measurement customers.
• Support multi-board systems in enclosures, reliability/MTBF analysis, and (where applicable) aerospace/defense compliance (MIL-810, MIL-461, DO-254/DO-178).
• Collaborate cross-functionally with hardware, layout, mechanical, FPGA, and software teams; act as technical point of contact for global customers and partners.
• Represent technical capabilities at trade shows, customer meetings, and conferences (US, Europe, Asia).

Required Skills & Experience

• Strong hands-on experience in high-speed digital hardware design and product development for semiconductor/test platforms.
• Proven expertise in PCIe Gen5/6, SerDes (PAM4/NRZ), signal integrity (S-parameters, eye diagrams, equalization, jitter), and power integrity.
• Experience with EDA tools: Keysight ADS, HyperLynx (SI/PI), Cadence Allegro/OrCAD, Siemens Mentor Xpedition (or equivalent).
• Familiarity with FPGA tools (Xilinx/AMD Vivado) and board bring-up/debug.
• Knowledge of form factors: PCIe CEM, Open VPX (VITA 65/46), VNx+, XMC, FMC.
• Experience with protocol analyzers/exercisers, NVMe SSD validation platforms, and high-speed test equipment (scopes/AWGs to 67 GHz preferred).
• Ability to translate complex customer requirements into system solutions, author technical proposals, and support pre-sales / design-win activities.
• Strong system-level ownership across architecture, hardware, FPGA/RTL awareness, firmware, and integration.
• Excellent communication skills for global customer engagement (USA, Europe, Asia). Valid travel documents (B1/B2, Schengen) are a plus.

Preferred / Nice-to-Have

• Background in aerospace/defense avionics (MIL-STD-1553B, ARINC 429/818, multi-function displays, VPX SBCs).
• Experience managing or mentoring hardware/layout teams.
• Prior design wins with Tier-1 semiconductor, memory, or test & measurement companies.
• Familiarity with AI/LLM tools for technical research, documentation, and proposal support.

Education

Diploma or Bachelors equivalent in Electronics& Communication Engineering (or related field). Higher qualifications or professional certifications are advantageous.