Principal Systems Validation Engineer

MaxLinear; Singapore; On-site; SGD 120,000 - 150,000; Full time

Job summary

MaxLinear is seeking a highly experienced PCI Express (PCIe) Validation Expert to lead pre- and post-silicon validation efforts for high-speed storage accelerators in Singapore. The ideal candidate will have at least 12 years of experience focused on PCIe validation, along with deep understanding of the PCIe protocol stack, debugging skills, and experience with high-speed Serdes tuning.

This role requires hands-on experience with protocol analyzers and other lab tools, and the ability to work cross-functionally with various teams to deliver high-quality silicon to production.

Qualifications

• At least 12 years of working experience in silicon validation with PCIe focus.
• Experience with system validation in complex SoC environment.
• Deep understanding of PCIe protocol stack.
• Hands-on experience with PCIe analyzers and signal integrity tools.

Responsibilities

• Own PCIe validation strategy for Storage Accelerator products.
• Define coverage plans including protocol and compliance scenarios.
• Lead PCIe link bring-up and tuning across multiple generations.
• Ensure interoperability with leading server CPUs.
• Develop automation frameworks for validation scalability.

Skills

PCIe validation

Debugging skills

C/C++ programming

High-speed Serdes tuning

Education

Bachelor or Master’s degree in Computer Engineering or related field

Tools

Protocol analyzers

Oscilloscopes

Logic analyzers

Job description

Responsibilities

We are seeking a highly experienced PCI Express (PCIe) Validation Expert to lead pre‑ and post‑silicon validation efforts for high-speed storage accelerators. In this role, you will drive end‑to‑end PCIe validation, ensuring high‑performance, standards compliance (PCIe Gen3/Gen4/Gen5 where applicable), and robust interoperability across a wide ecosystem. You will work cross‑functionally with architecture, design, firmware, PHY, and system teams to define validation strategies, root‑cause complex issues, and deliver high‑quality silicon to production. You will focus on:

• Own PCIe validation strategy and execution for the Storage Accelerator products across pre‑silicon and post‑silicon phases
• Define coverage plans including protocol, link, PHY, power management, and compliance scenarios
• Lead PCIe link bring‑up, training, and tuning across multiple generations (Gen3/4/5/6)
• Perform deep debug using protocol analyzers, oscilloscopes, and logic analyzers
• Drive PCI‑SIG compliance testing including electrical and protocol validation
• Ensure interoperability with server CPUs from leading manufacturers
• Develop and enhance automation frameworks (Python, C/C++) for validation scalability
• Own and manage Functional Circuit Test (FCT) and In‑Circuit Test (ICT) processes
• Lead RMA analysis and work closely with customers and manufacturing teams to resolve board‑level issues
• Work closely with Architecture, Design, Software and Signal integrity teams
• Coordinate test program and test automation scripts development
• Coach junior engineering staff

Qualifications

• Bachelor or Master’s degree in Computer Engineering, Electrical/Electronics Engineering, or related field with at least 12 years of working experience in silicon validation or system validation with strong PCIe focus
• Experience with system validation in complex SoC (System on Chip) environment
• Deep understanding of PCIe protocol stack (Transaction, Data Link, Physical layers), PCIe power management, link training and equalization
• Hands‑on experience with PCIe analyzers, scopes, and signal integrity tools
• Strong debugging skills in hardware/software co‑debug
• Experience with high‑speed Serdes tuning and validation methodologies
• Familiarity with system board design/debugging and usage of lab equipment like oscilloscope and logic analyzer
• Good understanding of high‑speed interface system/electrical verification & validation
• Experience in C/C++ programming and other test script development languages
• In‑depth expertise of PCIe Gen3/Gen4/Gen5
• Storage/Networking domain expertise is highly desirable
• Knowledge of state‑of‑the‑art data compression and cryptographic algorithms