NAND-CMOS Device Engineer: AI-Driven Innovation & Mentorship

MICRON SEMICONDUCTOR ASIA OPERATIONS PTE LTD

Singapore

On-site

SGD 120,000 - 180,000

Full time

14 days+

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Job summary

Micron Technology, Inc. in Singapore is seeking a device engineering professional to drive NAND-CMOS roadmap alignment and collaborate with design, TCAD, and manufacturing teams. You will define transistor targets, develop models, and optimize layouts to ensure reliable transistor performance across generations.

The role emphasizes interdisciplinary collaboration, innovation, and AI-enabled automation. The ideal candidate thrives in a fast-paced, inclusive environment and contributes to

Responsibilities

  • You give directions on how to improve our device portfolio, both in performance and cost effectiveness
  • You define, execute, and analyze silicon experiments for future device generations
  • Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
  • Work with TCAD simulation group to develop strategies for transistor structures to meet targets
  • You strive to ensure that transistor models are correctly targeted to anticipate final silicon
  • Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
  • Highly motivated to ensure transistors are developed meeting the required reliability standards
  • You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
  • You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues
  • Proficiency in AI - leverage AI tools and enable Agent-AI solutions to automate your day-day workflow

Job description

Micron Technology, Inc. in Singapore is seeking a device engineering professional to drive NAND-CMOS roadmap alignment and collaborate with design, TCAD, and manufacturing teams. You will define transistor targets, develop models, and optimize layouts to ensure reliable transistor performance across generations.

The role emphasizes interdisciplinary collaboration, innovation, and AI-enabled automation. The ideal candidate thrives in a fast-paced, inclusive environment and contributes to

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