FPGA Engineer

Zerro Power Systems Pte Ltd; Singapore; On-site; SGD 70,000 - 90,000; Full time

Job summary

Consortium for Clinical Research and Innovation Singapore is looking for a skilled FPGA Engineer to join their hardware development team. Responsibilities include implementing RTL designs on Xilinx FPGA hardware, collaborating with Embedded Systems Engineers, and developing test plans for validation and performance testing. Candidates should have a Bachelor’s or Master’s in Electrical/Electronics Engineering, 3+ years of FPGA experience, and proficiency in Xilinx Vivado Design Suite. The role offers opportunities for significant hands-on experience and collaboration within a cross-functional team.

Qualifications

• 3+ years of hands-on experience in FPGA implementation and validation.
• Practical knowledge of FPGA board-level integration and debugging.
• Strong problem-solving and troubleshooting skills.

Responsibilities

• Implement RTL code on Xilinx FPGA hardware.
• Develop and execute test plans for validation and performance testing.
• Collaborate with Embedded Systems Engineers.

Skills

FPGA implementation

Xilinx 7-series

Verilog/VHDL

Problem-solving

Collaboration

Education

Bachelor’s or Master’s in Electrical/Electronics Engineering or related field

Tools

Xilinx Vivado Design Suite

Vivado Integrated Logic Analyzer

Git

Job description

We are seeking a skilled and hands-on FPGA Engineer to join our hardware development team. You will take RTL designs created by our Digital Design Engineers and implement them on Xilinx FPGA hardware (Artix-7 and Kintex families). You will work closely with Embedded Systems Engineers to integrate additional boards and peripherals, then test and validate the designs on actual hardware.

Key Responsibilities

• Take RTL code (provided by digital engineers) through the complete Xilinx FPGA implementation flow: synthesis, place & route, timing analysis/closure, and bitstream generation using Vivado Design Suite.

• Program and configure Xilinx Artix-7 and Kintex family FPGAs on target boards.

• Collaborate closely with Embedded Systems Engineers to integrate additional boards, daughter cards, peripherals, and interfaces into the FPGA system.

• Develop and execute test plans for functional validation, performance testing, and hardware-in-the-loop verification of the RTL.

• Debug RTL and hardware issues using Vivado Integrated Logic Analyzer (ILA), VIO, oscilloscopes, logic analyzers, and other tools.

• Support board bring-up and overall system-level integration.

Requirements

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering, Computer Engineering, or a related field.

• 3+ years of hands‑on experience in FPGA implementation and validation, with strong focus on Xilinx 7‑series (Artix‑7 and/or Kintex).

• Proficiency with Xilinx Vivado Design Suite (synthesis, implementation, timing closure, bitstream generation, and programming).

• Solid experience in Verilog and/or VHDL.

• Practical knowledge of FPGA board‑level integration, I/O constraints, clock domain crossing, and hardware debugging.

• Strong problem‑solving and troubleshooting skills in a collaborative, cross‑functional environment.

• Ability to work effectively with Digital Design and Embedded Systems teams.

Preferred Skills

• Experience with common interfaces like SPI, I2C, LIN, CAN, Single wire

• Familiarity with embedded processors or soft‑core CPUs inside FPGAs.

• Scripting skills (Tcl/Python) for tool automation.

• Experience using Git for version control.