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Black Sesame Technologies (Singapore) Pte Ltd is hiring to assist in designing micro-architecture and RTL for ISP and CV algorithms. You will support power, performance, and area analysis while collaborating with cross-functional teams to verify and validate ASIC designs.
The role involves RTL development in Verilog/SystemVerilog, use of Catapult HLS, and FPGA-related emulation and debugging to facilitate hardware verification and prototype testing. Strong background in ASIC/ISP is required.
Black Sesame Technologies is a leading automotive-grade computing SoC and intelligent vehicle solution provider. Founded in 2016 and listed on the Hong Kong Stock Exchange, we innovate SoCs for autonomous driving and smart vehicle applications, empowering safer, smarter mobility.
Assist in designing micro-architecture and RTL for ISP and computer vision algorithms, supporting power, performance, and area analysis, and collaborating with cross-functional teams to ensure verification and validation of ASIC designs.