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Job summary
A growing system engineering company in Sweden is seeking an experienced ASIC Designer. The ideal candidate will have over 10 years of experience in ASIC/SoC design and development, demonstrating ownership of multiple ASIC projects from specification to tape-out. Proficiency in Verilog/SystemVerilog and strong problem-solving skills are essential. The role requires collaboration with cross-functional teams and mentoring junior engineers. This position is onsite in Göteborg.
Qualifications
10+ years of experience in ASIC/SoC design and development.
Demonstrated ownership of multiple ASIC projects from specification to tape-out.
Good understanding of functional verification methodologies.
Knowledge of UPF/CPF, clock gating, and power domains.
Responsibilities
Define and document chip-level architecture including block diagrams.
Collaborate with verification teams on test plans and coverage.
Guide physical design teams on timing paths and floorplanning.
Experience mentoring junior engineers and reviewing designs.
Skills
Expert-level proficiency in Verilog/SystemVerilog for RTL design
Strong debugging and problem-solving skills
Ability to collaborate with verification teams
Proficiency in Python, Perl, or Tcl for automation
Tools
Synopsys Design Compiler
Cadence Genus
VCS
Questa
ModelSim
Job description
A growing system engineering company in Sweden is seeking an experienced ASIC Designer. The ideal candidate will have over 10 years of experience in ASIC/SoC design and development, demonstrating ownership of multiple ASIC projects from specification to tape-out. Proficiency in Verilog/SystemVerilog and strong problem-solving skills are essential. The role requires collaboration with cross-functional teams and mentoring junior engineers. This position is onsite in Göteborg.