Senior ASIC Designer: Lead SoC Architect & RTL Expert

Professional Galaxy AB; Stockholms kommun; Hybrid; SEK 700,000 - 950,000; Full time

Job summary

A leading technology firm in Stockholm seeks a Senior ASIC Design Engineer with 8–15+ years of experience in ASIC/SoC design and development. The successful candidate will demonstrate ownership of ASIC projects and lead multi-functional teams. A strong background in Verilog/SystemVerilog, Python scripting, and problem-solving skills are essential. This role requires on-site presence at least three days a week in accordance with company policies, but remote applicants are also encouraged to apply. Competitive compensation and growth opportunities are provided.

Qualifications

• 8–15+ years of experience in ASIC/SoC design and development.
• Demonstrated ownership of multiple ASIC projects.
• Expert-level proficiency in Verilog/SystemVerilog for RTL design.

Responsibilities

• Define and document chip-level architecture.
• Mentor junior engineers and review designs.
• Collaborate with verification teams on test plans.

Skills

ASIC/SoC design and development

Verilog/SystemVerilog

Python

Leadership

Debugging

Tools

Synopsys Design Compiler

Cadence Genus

VCS

Questa

ModelSim

Job description

A leading technology firm in Stockholm seeks a Senior ASIC Design Engineer with 8–15+ years of experience in ASIC/SoC design and development. The successful candidate will demonstrate ownership of ASIC projects and lead multi-functional teams. A strong background in Verilog/SystemVerilog, Python scripting, and problem-solving skills are essential. This role requires on-site presence at least three days a week in accordance with company policies, but remote applicants are also encouraged to apply. Competitive compensation and growth opportunities are provided.