Senior ASIC Backend Engineer: Timing, Power & SI Lead

Swediumglobal; Stockholms kommun; On-site; SEK 500,000 - 700,000; Full time

Job summary

A growing System Engineering company in Sweden is seeking a skilled engineer with over 5 years of experience in semiconductor engineering. The role involves physical design implementation, addressing timing closure, and leading projects with a focus on collaboration. The ideal candidate will have proficiency in Cadence tools and programming skills in Tcl, Perl, or C. Join a team that offers services to clients across multiple countries, supporting both onsite and offshore operations.

Qualifications

• 5+ years of experience in semiconductor engineering and physical design.
• Proficient in Cadence tools for design implementation.
• Strong programming skills in Tcl, Perl, or C.

Responsibilities

• Implement physical design using advanced methodologies.
• Address timing closure and signal integrity issues.
• Lead projects and collaborate effectively in a team.

Skills

Physical design implementation

STA tool and timing closure methodologies

Power grid, clock tree implementation

Signal integrity issues

Tcl programming

Team leadership

Tools

Cadence tools

Job description

A growing System Engineering company in Sweden is seeking a skilled engineer with over 5 years of experience in semiconductor engineering. The role involves physical design implementation, addressing timing closure, and leading projects with a focus on collaboration. The ideal candidate will have proficiency in Cadence tools and programming skills in Tcl, Perl, or C. Join a team that offers services to clients across multiple countries, supporting both onsite and offshore operations.