In our Dresden ASIC development center, we design ASICs for Bosch Sensortec. In this role, you will be responsible for the physical implementation of complex digital designs within mixed-signal SoC ASICs for consumer applications.
Job description:
Create something new: You will work in interdisciplinary teams taking responsibility for the full RTL2GDS flow including Synthesis, Place & Route, Physical Design Verification, and Design for Testability.
Reliable implementation: You will help ensure "first time right" IC designs by generating robust timing constraints for synthesis and processing powerful sign-off checks, such as Logic-Equivalence-Check (LEC) and static timing analysis (STA) on top-level. You will also ensure power integrity by executing electromigration (EM) and IR-drop analysis and product quality by Automatic Test Pattern Generation (ATPG).
Think holistically: You understand design requirements, derive constraints, create physical implementations at gate level, verify timing requirements on post-layout netlists, and create documentation in accordance with the design. You will collaborate closely with architecture, digital, layout, and analog teams.
Networked communication: You will work in an international and globally distributed team of experts.
Conscientious coordination: You will support continuous improvement of our Physical Design methodology, flow, and verification strategies.