Integrated Chip Design Engineer

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About Quantum Brilliance

Quantum Brilliance is the world leader in room-temperature quantum computing using synthetic diamonds. Our unique vision is to make quantum computing available as an everyday technology, from data centres to remote and mobile systems like autonomous robots and satellites. In contrast to quantum computers that fill a room, we are developing quantum accelerators with more compute power than a classical supercomputer but in a form factor smaller than a lunchbox.

Founded in 2019 by leaders in diamond quantum science from the Australian National University, we are a full-stack quantum computing company. An Australia-German company, our HQs are in Canberra and Stuttgart, with additional locations across eastern Australia and southern Germany. We are working with global technology leaders to develop quantum computing applications, integrate quantum with high-performance computing, solve materials science challenges and develop ultra-precise semiconductor manufacturing and quantum control techniques. We are backed by leading venture capital funds and major research and technology institutes.

What we do in our Stuttgart Labs:

In Stuttgart, we are working to bring all the pieces together to build the Integrated Quantum Chip. This new chip is based on diamond and contains the core components for harnessing the power of quantum technologies. You will play a crucial role in developing and implementing device modelling solutions, from fundamental physical models to compact models suitable for circuit simulations, contributing to the overall design and optimization of our prototype integrated quantum devices and products.

Your key tasks will include:

• Research and analyze state-of-the-art integrated circuit solutions relevant to quantum technology applications (e.g., qubit control, readout, sensing).
• Lead or contribute to the architectural definition and specification of custom ASICs for quantum control and readout.
• Design and simulate critical analog and mixed-signal blocks within the ASIC, such as MW/RF sources and receivers, ADCs/DACs, low-noise amplifiers, and high-speed digital interfaces; oversee the layout and physical design of ASICs, ensuring adherence to design rules and performance targets; participate in the tape-out process and collaborate with fabrication partners.
• Collaborate with system architects and packaging engineers to define appropriate integration and packaging solutions for the integrated diamond quantum devices and control ASICs.
• Define and execute test plans for the fabricated ICs, including functional testing, performance characterization, and reliability testing.

(Your tasks can be adjusted to match your skills and interests – this is your chance to add your personal input! )

About you:

• You hold a PhD or Master's degree in Electrical Engineering or a related discipline with a strong focus on integrated circuit design.
• You have proven experience (typically 5+ years for Master's, 2+ years for PhD) in analog and/or mixed-signal IC design.
• You have a solid understanding of layout considerations and physical design principles for integrated circuits, of CMOS technologies, and hands-on experience with industry-standard EDA tools for circuit design and simulation.
• Demonstrated experience in the design and simulation of one or more of the following circuit types:
• Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs).
• Constant current sources and voltage references.
• You have experience with circuit characterization and validation using lab equipment.
• You have strong analytical and problem-solving skills with the ability to debug and optimize IC performance.
• You can work independently and as part of a team in a fast-paced, high-tech environment. You are self-motivated, well-organized, and meticulous in following procedures. You have excellent communication and presentation skills, with the ability to clearly articulate design concepts and results.
• You are eager to learn and adapt quickly to new challenges.
• You speak English; German is a plus.

What we offer:

• Exciting work at the intersection of research and application, with diverse tasks in a dynamic, team-oriented environment.
• Flexible working hours although work is primarily on-site.
• Space for your ideas – be creative and make a real impact!

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Research

• Industries

  Computer Hardware Manufacturing, Semiconductor Manufacturing, and Nanotechnology Research

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