ASIC Physical Design Engineer (analog upper tariff / PC05, f/m/div.)

Job Description

Do you want beneficial technologies being shaped by your ideas? Whether in the areas of mobility solutions, consumer goods, industrial technology or energy and building technology - with us, you will have the chance to improve quality of life all across the globe. Welcome to Bosch.

The Bosch Sensortec GmbH is looking forward to your application!

Employment type: Unlimited
Working hours: Full-Time
Joblocation: Dresden

In our Dresden ASIC development center, we design ASICs for Bosch Sensortec. In this role you will be responsible for the physical implementation of complex digital designs within mixed-signal SoC ASICs for consumer applications.

Job description:

• Create something new: You will work in interdisciplinary teams taking responsibility for full RTL2GDS flow including Synthesis, Place & Route, Physical Design Verification and Design for Testability
• Reliable implementation: You will help to ensure "first time right" IC designs by generating robust timing constraints for synthesis and processing of powerful sign-off-checks, such as Logic-Equivalence-Check (LEC) and static timing analysis (STA) on top-level; You will ensure power integrity by executing electromigration (EM) and IR-drop analysis and product quality by Automatic Test Pattern (ATPG)
• Think holistically: You understand design requirements, derive constraints, create physical implementations at gate level, verify timing requirements on post-layout netlists and create documentation in accordance with the design; For this, you will collaborate closely with the architecture, digital, layout and analog teams
• Networked communication: You will work in an international and globally distributed team of experts
• Conscientious coordination: You will support us in continuously improving our Physical Design methodology, flow and verification strategies

• Personality: Strong problem-solving mindset with a high level of technical curiosity and a drive to stay at the forefront of physical design technologies
• Working Practice: Independent, detail-oriented, and quality-driven working style with strong team collaboration skills in complex project environments
• Experience: 3 to 5 years+ of industry experience or a fitting PhD are mandatory; High expertise in state-of-the-art Physical Design EDA tools, preferably in the Synopsys and Ansys tool chains; Strong experience in physical design verification methodologies (e.g., Static Timing Analysis, EM/IR-drop analysis) in advanced technology nodes; Deep understanding of low power strategies (clock gating, power gating, UPF); proficient in integration of DfT (Design-for-Test) features for scan testing with sufficient coverage; Profound skills in scripting and programming such as TCL and Python; Basic knowledge of Verilog/VHDL hardware description is beneficial
• : Proficient in English; additional skills are a plus
• Education: Degree (Dipl.-Ing./M.Sc./PhD) in electrical engineering or a related field with outstanding academic results

• Work-life balance: Flexible working in terms of time, place and working model.
• Health & Sport: Wide range of health and sports activities.
• Childcare: Intermediary service for childcare services.
• Employee discounts: Discounts for employees.
• Room for creativity: Space for creative work.
• In-house social counseling and care services: Social counselling and intermediary service for care services.

The recruitment contact or superior will be happy to provide information about the individual benefit plan.

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