Senior Analog IC Design Engineer - High-Speed PLLs & Power

A growing technology company is seeking a Senior Analog IC Design Engineer to design and develop high-speed PLLs and implement on-chip power management circuits. The ideal candidate will have a proven background in PLL and power management design, expertise in CMOS analog fundamentals, and collaboration skills. This role offers a chance to work on cutting-edge technologies in a dynamic environment located in Italy, Tuscany, Pisa.