FPGA Engineer

Mobizy; Porto; Presencial; EUR 42 000 - 64 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Meal allowance

Health insurance for employees

Shuttle transport to Porto/Leiria/Pon\

Resumo da oferta

TEKEVER’s Innovation Team is seeking an FPGA-focused engineer to explore and validate next-generation ISL platform features. You will lead feasibility studies, translate mission needs into architectures, and design FPGA/SoC solutions for high-throughput pipelines.

Strong knowledge of HDL, DSP, and model-based design with Python or MATLAB/Simulink is required. English is essential; conversational Portuguese is valued for collaboration with cross-functional teams.

Qualificações

• 2–3+ years hands-on FPGA development for high-throughput digital systems.
• Strong fundamentals in communication theory and DSP implementation constraints.
• Proficiency in VHDL/Verilog/SystemVerilog and FPGA toolchains.
• Model-Based Design capability using Python and/or MATLAB/Simulink.

Responsabilidades

• Lead feasibility studies and concept validation for new Software Defined Radio features.
• Define requirements and system interfaces, translating mission needs into implementable architectures.
• Design and implement FPGA/SoC solutions for modern comms pipelines (sync, framing, FEC).
• Drive FPGA/software partitioning and trade-offs (latency, power, resources).
• Integrate and validate designs with high-speed peripherals and test setups.
• Maintain and refine system models (Python and MATLAB/Simulink).
• Produce high-quality technical documentation (architecture, verification).

Conhecimentos

FPGA development

DSP concepts

HDL (VHDL/Verilog)

Version control

Model-Based Design

English & Portuguese

Ferramentas

Python

MATLAB/Simulink

CI basics

Descrição da oferta de emprego

Join TEKEVER’s Innovation Team – a multidisciplinary group responsible for defining and validating next‑generation functionalities for our flight‑proven Inter‑Satellite Link (ISL) platform. Your mission is to explore and de‑risk new concepts such as enhanced time synchronization, higher data rates, new protocol compatibility, and solutions to new space challenges.

Key Responsibilities

• Lead feasibility studies and concept validation for new Software Defined Radio features (time sync, throughput increases, protocol evolution).
• Define requirements and system interfaces, translating mission needs into implementable architectures.
• Design and implement FPGA/SoC solutions for modern comms pipelines (sync, framing, FEC integration, high‑rated data paths).
• Drive FPGA/software partitioning and trade‑offs (latency, power, resources, maintainability, risk).
• Apply and evaluate state‑of‑the‑art implementations/techniques relevant to modern RF protocols and complex waveforms.
• Integrate and validate designs with high‑speed peripherals (e.g., high‑speed serial links, DDR, DMA‑based streaming, ADC/DAC interfaces depending on platform).
• Maintain and refine system models (Python and/or MATLAB/Simulink) as golden references to ensure repeatable performance across iterations.
• Collaborate with RF, PCB, instrumentation, and testing to ensure end‑to‑end viability and testability.
• Produce high‑quality technical documentation (architecture, design rationale, verification approach, and trade‑off reports).

Core Requirements

• 2–3+ years hands‑on experience in FPGA development for high‑throughput digital systems and/or communications signal chains.
• Strong fundamentals in communication theory and DSP implementation constraints (fixed‑point, throughput/latency trade‑offs).
• Proficiency in VHDL/Verilog/SystemVerilog and familiarity with FPGA development and test toolchains.
• Version control proficiency with collaborative engineering workflows (branching, reviews, CI basics preferred).
• Model‑Based Design capability using Python and/or MATLAB/Simulink with an emphasis on reproducibility.
• Comfortable operating from requirements → architecture → implementation → validation.
• Strong technical communication skills; advanced proficiency in English with conversational Portuguese highly valued.

Nice to Have

• SoC experience (FPGA fabric + embedded cores; Linux/bare‑metal; HW/SW co‑design).
• Familiarity with space standards for communication at application layer CCSDS and physical layer DVB‑S2 (or strong equivalents from 5G/Wi‑Fi and related PHY stacks).
• X‑in‑the‑Loop (MiL/SiL/HiL) and test automation.
• Comfort with lab instrumentation, interface debugging, and board‑level integration.

What We Have To Offer You

• A dynamic and collaborative working environment, with the opportunity to make a real impact.
• A competitive salary package, aligned with your proven level of experience.
• Meal allowance and health insurance for employees.
• Shuttle transport service to the offices in Leiria, Caldas da Rainha and Ponte de Sor.
• Bonus in line with company policy.
• Access to the Employee Assistance Programme (EAP).