Senior Verification Engineer (UVM/SystemVerilog)

Square One Resources

Polska

Hybrid

PLN 180,000 - 260,000

Full time

4 days ago
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Job summary

Square One Poland is seeking a Senior Verification Engineer to join our client’s project, focusing on UVM/SystemVerilog verification for complex hardware IPs.

You will design and implement verification environments from the ground up, build drivers, monitors, scoreboards and coverage models, integrate VIPs for PCIe, DDR and AXI, and collaborate with hardware and software teams to ensure robust functional coverage.

Qualifications

  • At least 5 years of verification experience.
  • Proven ability to build verification environments from the ground up.
  • Experience with UVM and SystemVerilog.
  • Strong knowledge of Verification IPs and industry-standard protocols, including PCIe, DDR, and AXI.

Responsibilities

  • Perform the full range of functional verification activities.
  • Develop verification environments from scratch, including drivers, monitors, scoreboards, and coverage models.
  • Integrate Verification IPs (VIPs) for protocols such as DDR, PCIe, and AXI.
  • Define and implement verification sequences for complex control-flow scenarios.
  • Gain a system-level understanding of products with strong hardware-software interaction.
  • Integrate and maintain reference models.

Skills

UVM
SystemVerilog
Verification IPs
PCIe
DDR
AXI
C/C++/Python

Job description

Senior Verification Engineer (UVM/SystemVerilog)
Our requirements
  • At least 5 years of verification experience.
  • Proven ability to build verification environments from the ground up.
  • Experience with UVM and SystemVerilog.
  • Strong knowledge of Verification IPs and industry-standard protocols, including PCIe, DDR, and AXI.
Optional
  • Understanding of hardware-software interaction.
  • Experience with C, C++, Python, or SystemC.
  • Perform the full range of functional verification activities.
  • Develop verification environments from scratch, including drivers, monitors, scoreboards, and coverage models.
  • Integrate Verification IPs (VIPs) for protocols such as DDR, PCIe, and AXI.
  • Define and implement verification sequences for complex control-flow scenarios.
  • Gain a system-level understanding of products with strong hardware-software interaction.
  • Integrate and maintain reference models.
Opis oferty

We're looking for Senior Verification Engineer to join our client's project

  • Start ASAP

#OneSquareOne - one team, many talents

Square One Poland specializes in IT outsourcing and supporting companies in building and scaling technology teams. We help international organizations access proven IT specialists, carefully matched to project requirements and company culture.

We act as a strategic partner, enabling effective team scaling — from individual experts to complete project teams — based on transparent cooperation and long-term, win–win relationships. For IT professionals, we offer inspiring projects delivered with modern technologies, clear communication, and real opportunities for professional growth.

Operating internationally, we combine years of experience with creativity, agility, and flexibility. Despite our market maturity, we retain a start-up DNA that allows us to respond quickly to changing business needs.

Our organizational culture is confirmed by the Great Place to Work® 2026 certification.

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