Senior ASIC/FPGA Design Engineer – Poland

Eltronic A/S; Katowice; On-site; PLN 180,000 - 260,000; Full time

Benefits offered by this job

Hybrid working some days a week

Flat organizational structure

International and flexible environment

Job summary

Chip Interfaces in Katowice, Poland, seeks a Senior ASIC/FPGA Design Engineer to develop advanced IP for AI, data centres, space, and telecom applications. You will design, implement, and customize IPs, collaborating globally across teams and with customers.

Key tasks include defining design specs, RTL implementation and verification, and creating technical documentation. Strong English, VHDL/Verilog/SystemVerilog experience, and a degree in engineering are required.

Qualifications

• Extensive experience with VHDL, Verilog, or SystemVerilog.
• Solid understanding of the ASIC/FPGA development flow.
• Strong RTL design and verification background.

Responsibilities

• Contribute to defining design specifications for new IP.
• Implement design and basic verification in Verilog/SystemVerilog.
• Prepare user manuals and other technical design documentation.
• Collaborate with the verification team to ensure thorough product validation.
• Support customers during product integration and use of our IP.

Skills

VHDL

Verilog

SystemVerilog

Education

Bachelor’s or Master’s degree in Engineering

Job description

Senior ASIC/FPGA Design Engineer – Poland
Develop advanced IP for tomorrow’s microchips Katowice Created: 08/07/2026
Applications will be screened regularly

- Develop advanced IP for tomorrow’s microchips

As part of our continued growth, we are looking for a motivated and experiencedSenior ASIC/FPGA Design Engineerto join our team inKatowice, Poland.

In this role, you will contribute to the development of next-generation semiconductor Intellectual Property (IP) for applications in AI, datacentre’s, space, aerospace &defence, and telecom/radio access networks. This is an exciting opportunity for an experienced RTL designer who wants to work on advanced technologiesand help shape the future of semiconductor innovation.

About the Role

We are expanding our Katowice office to support the development of new and existing IP solutions.As a Senior ASIC/FPGA Design Engineer, you will play a key role in the design, implementation, and customization of IPs, working closely with colleagues across the organization as well as with customers around the world.

You will also support customers during product integration, helping ensure our IPs are implemented smoothly and successfully in their projects.

Key Responsibilities

Contribute to defining design specifications for new products

Implement design and perform basic verification of designsin Verilog/SystemVerilog

Prepare user manuals and other technical design documentation

Collaborate with the verification team to ensure thorough product validation

Support customers with integration and use of our products

Your Background

Extensive experience withVHDL, Verilog, orSystemVerilog

Solid understanding of theASIC/FPGA development flow

Bachelor’s orMaster’s degree in Engineeringor a related field

Strong analytical and problem-solving skills, with a structured and systematic way of working

A proactive, solution-oriented mindset and the ability to turn ideas into action

Passion for technology and motivation to work at the forefront of your field

Strong written and spoken English skills

What We Offer

By joining Chip Interfaces, you will have the opportunity to influence the development of technologies that power tomorrow’s most important innovations worldwide. You will work with leading industry players and be part of a fast-growing, ambitious companyand team where knowledge sharing isnaturalpart of the daily work.

We offer:

A versatile and challenging role in an international and flexible working environment where hybrid working some days a week is possible

A flat organizational structure with short decision-making paths, room for initiative,entrepreneurshipand creativity

Part of ahighly skilled andpassionateteamof technology and engineering professionals

Who We Are

Chip Interfacesis a leading global provider of semiconductorIP cores. These IP cores are critical building blocks in chip design and require deep technicalexpertiseto develop. We have experienced significant growth and continue to pursue ambitious expansion plans.

We are committed to advancingnew technologiesthat enable the next generation of innovation. Through strong university collaborations, strategic partnerships, and industry relationships, we ensure our competitiveness and continuously developnew solutions. We value teamwork, accountability, and delivering on our promises.

We look forward to hearing from you.

For further information please contactPrincipal Engineer,SzymonGrzybek at M: [phone]