Lead Engineer, Development Product Engineering

Allegro MicroSystems, LLC; Muntinlupa; On-site; PHP 500,000 - 900,000; Full time

Job summary

Allegro MicroSystems, LLC in Metro Manila, Philippines, is seeking a Test Automation Engineer to design, develop, and deploy automated test solutions for wafer and package levels. You will collaborate across Design, Product Validation, Systems Engineering, and Manufacturing to define test plans, develop ATE programs, and hardware interfaces for robust coverage and efficient high‑volume releases.

You will lead software revisions, contribute to TEDs, and work with global teams to optimize

Qualifications

• Bachelor’s degree or equivalent with 3–5 years in semiconductors.
• Experience with probe and final test, qualification and reliability.
• Strong collaboration and project management skills.

Responsibilities

• Develop, debug, and document ATE test programs for wafer and package level tests.
• Configure product setups on Teradyne/Eagle (ETS) and SPATS platforms.
• Design and verify test interface hardware to ensure signal integrity.
• Perform data analytics and establish test limits and yield targets.
• Lead software revisions with C/C++ or ETS code and manage version control.
• Collaborate with IC Design for DFT features and multisite efficiency.
• Coordinate deployment of test solutions to AMPI and support ramps.

Skills

C/C++

Python

Test automation

DFT collaboration

Data analytics

Education

Bachelor's degree or equivalent

Tools

Teradyne/Eagle (ETS)

SPATS

Load boards

Job description

Overview

The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.

The opportunity involves designing, developing, and implementing automated test solutions for specific devices from product definition through high-volume production release. You will serve as a technical resource collaborating with Design, Product Validation, Systems Engineering, and Manufacturing teams to define test plans, develop ATE (Automated Test Equipment) programs, and design test hardware. Responsibilities focus on ensuring robust test coverage, optimizing test time, and supporting the seamless transition of products to global manufacturing sites.

What You Will Do

• Develop, debug, and document ATE test programs (software) for wafer‑level (Probe) and package‑level (Final Test).
• Configure product setups on Teradyne/Eagle (ETS), SPATS platforms, and industry‑standard device handlers.
• Design and verify test interface hardware (load boards, probe cards, socket assemblies) to ensure signal integrity; lead validation phases including Gage R&R (GR&R), stability studies, spike analysis, loop studies, and test‑time optimization.
• Perform data‑analytics and statistical reviews using JMP, Galaxy, or Python; establish robust test limits and yield targets through histograms, failure‑mode Pareto charts, and correlation studies to ensure test stability before high‑volume release.
• Collaborate with IC Design during pre‑silicon phases to define and implement Design for Test (DFT) features, maximizing test coverage and multisite efficiency for next‑generation products.
• Manage and deliver Product Test Capability (PTC) requirements; prepare technical validation summaries and defend findings to core team members and business‑unit management to secure production approval.
• Coordinate the deployment of test solutions to AMPI; act as the primary technical lead for initial production ramps, providing expert support to ensure high first‑pass yield and seamless site transfers.
• Generate and maintain comprehensive test‑environment documentation packages (TED); contribute to modular code libraries and hardware‑design standards to improve team‑wide efficiency.
• Lead software revisions (C/C++ or ETS code) and ensure formal version control and peer‑review protocols as a technical contributor to development projects.
• Define the hardware strategy for reliability stress testing (HTOL, HAST, etc.) and ensure accurate data correlation post‑stress.
• Provide proactive leadership in core team meetings, managing action items and maintaining detailed electronic product notebooks.
• Interface directly with U.S., European, and Asian counterparts to ensure project alignment with global test methodologies and technology roadmaps.
• Drive margin‑improvement targets by executing data‑driven throughput optimization and yield improvement projects, reducing manufacturing cycle time and product cost.

Qualifications

• Bachelor’s Degree or equivalent, coupled with 3 to 5 years of industry experience.
• Minimum 5 years of experience in the semiconductor industry.
• Strong knowledge of project management, planning, product development, probe test, final test, and qualification and reliability processes.