IC Layout Engineer

Xinyx Design Consultancy & Services, Inc.; Manila; On-site; PHP 446,400 - 669,600; Full time

Job summary

Xinyx Design Consultancy & Services, Inc. in Manila is seeking an IC Layout Engineer to develop and refine full-custom layouts for analog and mixed-signal blocks. Candidates should have 1–2 years of relevant experience and a Bachelor’s degree in Electronics or a related field. The role entails working closely with experienced engineers and requires strong problem-solving skills, attention to detail, and the ability to collaborate in a fast-paced environment.

Qualifications

• 1–2 years of experience in IC layout including internships.
• Practical experience in analog/custom IC layout or standard cell layout.
• Familiarity with layout best practices such as matching and symmetry.

Responsibilities

• Develop and refine full-custom IC layouts for analog and mixed-signal blocks.
• Execute layout tasks with increasing ownership.
• Support block-level floor-planning, placement, and routing.

Skills

Full-custom IC layouts

Analog custom layout

Problem-solving skills

Attention to detail

Teamwork

Education

Bachelor's degree in Electronics, Electrical, or Computer Engineering

Tools

DRC/LVS verification tools

Job description

We are looking for a IC Layout Engineer with 1–2 years of hands‑on experience who is ready to take the next step in their career. This role is ideal for engineers who already have foundational exposure to IC layout and are looking to deepen their expertise in full‑custom analog and mixed‑signal design within a structured, high‑performance environment.

You will gain end‑to‑end exposure, from block‑level layout to top‑level layout integration, while working alongside experienced engineers on production‑quality semiconductor designs.

Key Responsibilities

• Develop and refine full‑custom IC layouts for analog and mixed‑signal blocks
• Execute standard cell and custom layout tasks with increasing ownership
• Support block‑level floor‑planning, placement, and routing
• Perform and debug layout verification (DRC, LVS, ERC, and related checks)
• Apply and strengthen layout techniques such as matching, symmetry, shielding, and parasitic optimization
• Collaborate closely with circuit designers and other layout teams to ensure layout implementation accuracy and performance compliance
• Contribute to block‑to‑top level integration activities
• Deliver outputs aligned with project timelines and quality standards

Key Qualifications

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field
• 1–2 years of experience in IC layout (internship + full‑time experience considered)
• Practical experience in analog/custom IC layout or standard cell layout
• Working knowledge of DRC/LVS verification and debugging
• Familiarity with layout best practices (matching, symmetry, parasitic awareness)
• Strong problem‑solving skills and attention to detail
• Ability to work in a team‑oriented, fast‑paced environment