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Staff Digital Design Engineer

OMNIVISION

Norway

On-site

NOK 933,000 - 1,201,000

Full time

Today
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Job summary

A technology company is seeking a skilled digital designer in Oslo, Norway. The ideal candidate has over 7 years of experience in RTL design and verification, alongside strong expertise in chip development. Responsibilities include designing digital IP for CIS, mentoring junior staff, and ensuring successful project outcomes. Excellent English communication skills are essential. A cover letter is required outlining motivation to relocate.

Qualifications

  • Minimum MSEE + at least 7 yrs. of digital design experience.
  • Expertise in RTL design for ASICs.
  • Experience with logic synthesis and static timing analysis.
  • Knowledge of chip development cycle.
  • Excellent command of English.

Responsibilities

  • Design and verification of digital IP for CIS.
  • Define chip level architecture with trade-offs.
  • Perform logic synthesis and collaborate with backend team.
  • Drive innovation in design flow.
  • Mentor junior team members.
  • Participate in project planning and tracking.
  • Full-chip integration and verification.
  • Silicon bring-up and validation.

Skills

RTL design and verification
Logic synthesis
Static timing analysis
Collaboration across functional areas

Education

MSEE
Job description
Responsibilities
  • Design and verification of digital IP for CIS
  • Define chip level architecture taking into consideration power, performance & area trade-offs; build top level and module specification
  • Perform logic synthesis, work with backend team for floor planning, STA and DFT
  • Drive innovation and continuous improvement of design flow
  • Mentor junior team members
  • Participate in project planning and progress tracking
  • Full-chip integration and verification
  • Silicon bring-up, validation and debug
Qualifications
  • Minimum MSEE + at least 7 yrs. of digital design experience
  • Expertise in RTL design and verification for ASICs.
  • Experience handling logic synthesis and static timing analysis for multiple projects
  • Knowledge of all aspects of chip development cycle from design specification, architecture definition, low-power design, tape-out, to chip validation and debug
  • Technical lead experience is a plus
  • Knowledge of ASIL is a plus
  • Knowledge of DFT is a plus
  • Image processing/DSP knowledge is a plus
  • Excellent command of English as a working language is a must
  • Ability to work collaboratively with people across multiple functional areas

Please include a cover letter outlining your motivation to move to, live and work in Oslo, Norway.

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