Sr. Analog Mixed-Signal Circuit Design Engineer

SiTime Corp.; Rijswijk; On-site; EUR 90,000 - 130,000; Full time

Benefits offered by this job

Quarterly bonus

Equity grants

Competitive compensation package

Job summary

SiTime Corp. in the Netherlands is seeking a Sr. Analog Mixed-Signal Design Engineer to architect and implement precision timing circuits using MEMS technology.

You will work on architectures for high-performance networking, mobile platforms and wearable devices, with ownership of blocks from concept to silicon verification. The role emphasizes collaboration with product, test and layout teams, rigorous simulation, DFT/DFM considerations, and contribution to bring-up and characterization.

Qualifications

• M.S. in Electrical Engineering or related field with minimum 4 years of related experience, or Ph.D. in Electrical Engineering with minimum 2 years of related experience.
• Excellent academic record with published research projects prototyped and proven in silicon.
• Detailed knowledge of CMOS circuits and noise analysis.
• Core expertise in one of the following areas: Integer-N and fractional-N PLL, Sigma-Delta ADCs, Temperature sensor, Analog and digital filters, Quartz or MEMS oscillator, Sub-threshold circuits, Low noise regulator and bandgap, High-speed output drivers.
• Ability to oversee circuit layout for critical blocks
• Knowledge of programming languages: MATLAB, VerilogA
• Proficient in using Cadence analog design tools

Responsibilities

• Design analog and mixed-signal circuits meeting architectural requirements and technical specifications
• Contribute to the architectural definition of the design and chip integration
• Perform calculations, design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFM
• Work closely with Layout Engineers to validate proper layout, using all best-known methods
• Document assigned blocks, and hold preliminary and final design review meetings
• Actively participate in the chip bring-up, evaluation and characterization, with emphasis on owned blocks
• Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks
• Support other projects as needed by management or as business needs change

Skills

CMOS circuit design

Noise analysis

Architectural definition

DFT/DFM awareness

Circuit layout oversight

Education

M.S. in Electrical Engineering or related field

Ph.D. in Electrical Engineering (optional)

Tools

Cadence

MATLAB

VerilogA

Job description

About SiTime

SiTime is the Precision Timing company. Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com.

Job Summary

The Sr. Analog Mixed-Signal Design Engineer contributes to building precision timing circuits, leveraging SiTime’s industry-leading MEMS technology. These products have applications ranging from high-performance Networking and Communications Infrastructure to ultra-low power Mobile platforms, including wearable devices. It is not necessary to meet all job requirements to be a qualified candidate for the position.

Responsibilities

• Design analog and mixed-signal circuits meeting architectural requirements and technical specifications
• Contribute to the architectural definition of the design and chip integration
• Perform calculations, design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFM
• Work closely with Layout Engineers to validate proper layout, using all best-known methods
• Document assigned blocks, and hold preliminary and final design review meetings
• Actively participate in the chip bring-up, evaluation and characterization, with emphasis on owned blocks
• Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks
• Support other projects as needed by management or as business needs change

Qualifications & Requirements

• M.S. in Electrical Engineering or related field with minimum 4 years of related experience, or Ph.D. in Electrical Engineering with minimum 2 years of related experience
• Excellent academic record with published research projects prototyped and proven in silicon
• Detailed knowledge of CMOS circuits and noise analysis
• Core expertise in one of the following areas:
  • Integer-N and fractional-N PLL
  • Sigma-Delta ADCs
  • Temperature sensor
  • Analog and digital filters
  • Quartz or MEMS oscillator
  • Sub-threshold circuits
  • Low noise regulator and bandgap
  • High-speed output drivers
• Ability to oversee circuit layout for critical blocks
• Knowledge of programming languages: MATLAB, VerilogA
• Proficient in using Cadence analog design tools

Desired Characteristics & Attributes

• Passionate, self-starter with a strong commitment to flawless execution
• Excellent written and verbal communication skills required
• Ability to work well with others in a fast-paced collaborative team environment

Compensation Range

At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent. In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.

SiTime is committed to providing equal employment opportunities to all employees and applicants. Employment decisions are based on qualifications, merit, and business needs. We do not discriminate on the basis of any characteristic protected by applicable law.

Learn More about SiTime

Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique.

• Innovation on Top – Philosophies of Innovation with Rajesh Vashist
• Fabrication Knowledge – An Interview with Rajesh Vashist
• SiTime Corporation – YouTube