Graduate FPGA Engineer — Fast, Low-Latency Trading Tech

Academic Key; Amsterdam; Hybrid; EUR 42,000 - 64,000; Full time

Benefits offered by this job

Bonus

International team

Vacation days

Relocation package

Visa sponsorship

Commuting covered

Training opportunities

Job summary

Optiver in Amsterdam is seeking a Graduate FPGA Engineer (2027 Start) to work on real-time, nanosecond-scale hardware and low-latency networking alongside traders and engineers. You will join a Global Academy with mentoring, and contribute to impactful FPGA designs within a data-driven, international trading environment.

We welcome graduates with FPGA/ASIC academic experience and VHDL/Verilog/SystemVerilog skills, who are eager to learn and collaborate across disciplines.

Qualifications

• University degree in Electrical/Electronic Engineering or Computer Engineering.
• Graduating between August 2024 and August 2027, with a maximum of 3 years of work experience.
• Academic design experience with FPGAs or ASICs.
• Academic experience in VHDL, Verilog, or SystemVerilog.
• An open, collaborative, self-critical attitude and willingness to learn from your mistakes.
• A desire to understand how the systems you build fit into our trading activities.

Responsibilities

• Accelerate network infrastructure and trading system components with high-speed hardware designs.
• Research new low-latency techniques and platforms and identify opportunities for integration with our trading system.
• Collaborate in a multidisciplinary team of traders, software developers, and infrastructure engineers.
• Leverage the best hardware available or build in-house versions to ensure our FPGAs can interface with cutting-edge server hardware.

Skills

Collaboration

Willingness to learn

Open attitude

Education

University degree in Electrical/Electronic Engineering or Computer Engineering

Tools

VHDL

Verilog

SystemVerilog

Job description

Optiver in Amsterdam is seeking a Graduate FPGA Engineer (2027 Start) to work on real-time, nanosecond-scale hardware and low-latency networking alongside traders and engineers. You will join a Global Academy with mentoring, and contribute to impactful FPGA designs within a data-driven, international trading environment.

We welcome graduates with FPGA/ASIC academic experience and VHDL/Verilog/SystemVerilog skills, who are eager to learn and collaborate across disciplines.