SI/PI Engineer

UST Malaysia; Bayan Lepas; On-site; MYR 60,000 - 90,000; Full time

Job summary

UST Malaysia in Penang, Bayan Lepas, is hiring for a PI/SI engineer to advance power integrity for high-speed designs. You will run PI simulations, optimize PDN, and generate S-parameter models, with emphasis on PI reports and customer-facing design guides.

The role requires 1–5 years of SI/PI experience and hands-on use of HSPICE and Cadence Power tools. Collaboration with cross-functional teams is essential to drive improvements and ensure robust power delivery.

Qualifications

• Bachelor's or Master's Degree in Electrical Engineering, Electronics Engineering, Electrical & Computer Engineering or related field.
• 1–5 years of experience in Signal Integrity (SI) and/or Power Integrity (PI) design, analysis, or simulation.
• Hands-on experience with HSPICE, Cadence Sigrity PowerDC, and Cadence PowerSI.

Responsibilities

• Perform PI simulations and analysis using industry-standard tools such as HSPICE, Sigrity PowerDC, and PowerSI.
• Analyze and optimize package and PCB power plane designs for robust power delivery.
• Conduct PIBOM analyses and provide design recommendations.
• Generate and validate S-parameter models for PI/SI applications.
• Develop reusable PI simulation models and collateral for customer support and design enablement.
• Translate layouts and simulation results into PI reports and Platform Design Guides for customers.
• Collaborate with cross-functional teams to support design reviews, debugging, and PI-related improvements.

Skills

Power Integrity

Signal Integrity

HSPICE/Cadence tools

PDN concepts

Education

Electrical Engineering

Electrical & Computer Engineering

Tools

HSPICE

Cadence Sigrity PowerDC

Cadence PowerSI

Job description

Key Responsibilities

• Perform Power Integrity (PI) simulations and analysis using industry-standard tools such as HSPICE, Sigrity PowerDC, and PowerSI.
• Analyze and optimize package and PCB power plane designs to ensure robust power delivery performance.
• Conduct PIBOM (Power Integrity Bill of Materials) analysis and provide design recommendations.
• Generate and validate S-parameter models for signal and power integrity applications.
• Develop and maintain reusable PI simulation models and collateral for customer support and design enablement.
• Translate board/package layouts and simulation results into technical documentation, including PIER reports and Platform Design Guides, for internal and external customers.
• Collaborate with cross-functional teams to support design reviews, debugging activities, and PI-related design improvements.

Requirements

• Bachelor's or Master's Degree in Electrical Engineering, Electronics Engineering, Electrical & Computer Engineering, or a related field.
• 1-5 years of experience in Signal Integrity (SI) and/or Power Integrity (PI) design, analysis, or simulation.
• Hands-on experience with HSPICE, Cadence Sigrity PowerDC, and Cadence PowerSI.
• Understanding of power delivery networks (PDN), package design, and PCB layout concepts.
• Familiarity with PI simulation methodologies, modeling techniques, and S-parameter generation.

Preferred Qualifications

• Exposure to high-speed digital design and SI/PI concepts.
• Strong analytical and problem-solving skills.
• Good communication skills with the ability to create clear technical documentation and customer-facing deliverables.
• Ability to work effectively in a collaborative, cross-functional environment.