Senior Staff Engineer

TG Malaysia

Bayan Lepas

Hybrid

MYR 152,000 - 182,000

Full time

6 days ago

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Benefits offered by this job

Hybrid Work Arrangement

Dental

Optical

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Outpatient: Unlimited at panel clinics

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Insurance: 3 panel coverage

Job summary

TG Malaysia is seeking a Senior Staff Engineer – Analog Layout (RF) to lead RF layout efforts on complex transceiver blocks. Based in Penang Island with a hybrid work arrangement, you will collaborate with RF circuit designers and drive floorplanning, routing and verification using Cadence Virtuoso-VXL and Mentor Calibre.

The ideal candidate has a Bachelor in Electrical/Electronic Engineering with 8–15 years in RF layout, strong hands-on experience, and proven leadership to guide junior

Qualifications

Bachelor’s degree in Electrical/Electronic Engineering or Microelectronics with VLSI exposure.
8–15 years of RF Layout / RF Analog Layout experience.
Hands-on RF/Analog layout from scratch; implementation of layout techniques.

Responsibilities

Collaborate with RF circuit designers to iterate layouts and achieve performance.
Perform layout and verification using Cadence Virtuoso-VXL & Mentor Calibre.
Lead RF layout design across blocks/IP/chip; floor planning, routing and verification.
Guide and coach junior engineers to ensure on-time delivery.
Plan project schedules and distribute tasks within the team.
Conduct layout design reviews internally and externally with RF designers.

Skills

RF layout

Cadence Virtuoso-VXL

Mentor Calibre

submicron CMOS

RF/transmitter/receiver/PLL

DFM/parasitics

team leadership

Education

Bachelor’s Degree in Electrical / Electronic Engineering / Microelectronics with VLSI exposure

Tools

Cadence Virtuoso-VXL

Mentor Calibre

Job description

SENIOR STAFF ENGINEER – ANALOG LAYOUT (RF)

Location: Penang Island

Basic Salary: Up to RM15,000 + Benefits & Allowances

Work Arrangement: Hybrid

Key Responsibilities

Work closely with RF circuit designers to iterate circuit layouts and achieve required performance.
Perform critical circuit block, subsystem and top-level layout and verification using Cadence Virtuoso-VXL & Mentor Calibre and RF/Analog layout techniques.
Participate in RF circuit layout (block/IP/chip), including floor planning from scratch, routing, layout verification and resolving violations.
Lead/co-lead RF layout design while working closely with cross-functional team leaders.
Conduct thorough layout design reviews internally and externally with RF circuit designers.
Plan overall project schedules and distribute tasks to project team members.
Guide and coach junior engineers to ensure on-time delivery and quality.

Qualifications & Skills

Bachelor’s Degree in Electrical / Electronic Engineering / Microelectronics with VLSI exposure, or equivalent.
8–15 years of experience in RF Layout / RF Analog Layout.
Strong hands-on experience in RF/Analog Layout from scratch and implementation of RF/Analog layout techniques.
Experience with IR Drop / EM Analysis.
Deep understanding of RF/Analog circuit layout concepts in submicron CMOS technologies.
Experience in layout design and verification of high-performance RF Transmitter, Receiver and PLL subsystems.
Strong knowledge of matching, parasitic reduction, ESD and DFM.
Strong expertise in leading one or more IP Layouts.
Strong technical, analytical and problem-solving skills in RF/Analog layout.
Ability to drive ideas towards implementation for layout productivity, quality and methodology improvement.
Ability to work effectively as a strong team player and participate in cross-functional activities.
Good interpersonal, verbal and communication skills with a strong sense of initiative.