Senior Hardware Engineer (FPGA/CPLD)

Celestica; Bayan Lepas; On-site; MYR 120,000 - 180,000; Full time

Job summary

Celestica Malaysia seeks an experienced FPGA/CPLD engineer to lead the design and implementation of complex digital systems. You will work on architecture, requirements interpretation and cross-team coordination to deliver robust hardware solutions.

The role requires solid Verilog RTL proficiency, experience with industry tools such as ModelSim and Synplify, and the ability to read schematics and understand HW concepts like clocks, interrupts, and buses.

Qualifications

• BS/EE with 5+ years FPGA/CPLD development experience.
• Solid Verilog RTL and test bench coding skills.
• Familiar with Xilinx/Altera/Lattice FPGA platforms.
• Ability to read schematics and understand HW architecture basics.
• Experience in design, verification, and board-level integration.

Responsibilities

• Lead the design, development and implementation of FPGA/CPLD based solutions.
• Plan projects and coordinate across engineering teams.
• Review and interpret customer requirements and provide feedback.
• Design, modify and implement systems meeting Celestica needs and architecture constraints.
• Test, simulate and measure performance; troubleshoot issues.
• Maintain up-to-date knowledge of industry standards and regulations.

Skills

FPGA development

Verilog RTL

ModelSim

Synplify

Xilinx/Altera/Lattice

Digital design

Reading schematics

HW architecture basics

Education

Bachelor of Science in Electrical Engineering

Tools

ModelSim SE

Synplify

Job description

Jora Malaysia will close on 9th September 2026. Thank you for being with us, we are cheering you on as you continue your career journey.

Lead the design, development and implementation of technical solutions in multiple domains. Participate in project planning and scheduling. Review, interpret and may negotiate customer requirements/specifications and provide customer feedback Lead the deployment of strategic programs and coordinate site-wide deployment efforts.

Proactively promote industry best practices

May manage relationships with key vendors/partners.

Research systems ideas and draw up plans for these systems

Design, modify and implement systems that meet customer and Celestica needs. E.g. Architecture of solution: Divide up tasks for various engineering teams to execute taking into consideration requirements engineering, reliability, logistics, coordination of different teams, testing and evaluation, maintainability and many other disciplines necessary for successful system design and field support.

Test, simulate and measure (including troubleshooting) the performance of systems

Keep up to date with relevant industry knowledge and regulations

Solve complex problems

Liaison with suppliers, customers, contractors, and other internal teams.

Analyze and interpret data and information

Recommend system modifications

Create reports and documentation

Set yearly plans and goals for the department, give direction on expected performance, provide regular performance evaluations and ongoing feedback. Accountable for all department objectives and achieving agreed targets for key performance indicators.

Ability to read/understand schematics, have a basic understanding of HW architecture and concepts such as Clock, Interrupts, DC/DC, Ripple, Buses such as SATA/SAS/PCIe/I2C/SPI etc.

FPGA design processes including programming, constraints edit, functional verification, logic synthesis, floorplanand route, timing verification

Simulation tools of ModelSim SE

Synthesis tools of Synplicity Synplify

BS/EE with 5+ years of FPGA/CPLD development experience.

Solid Verilog RTL and test bench coding skills, good coding style.

Familiar with at least one mainstream FPGA and development platform, Xilinx/Altera/Lattice.

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.