Senior Analog Layout Engineer: From Block to Chip

Infineon Technologies AG

Penang

On-site

MYR 60,000 - 90,000

Full time

14 days+

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Job summary

Infineon Technologies AG in Malaysia – Penang invites engineers to join our Analog Layout team, working on advanced IC designs with experienced industry professionals. You will perform analog circuit block, subsystem and top-level layout and verification using Cadence Virtuoso, participate in floor planning, routing and layout reviews.

This role emphasizes teamwork, problem solving and communication as you plan block level schedules and contribute to cross‑functional activities in a global

Qualifications

Bachelor's degree in Electrical, Electronics Engineering or Microelectronics with VLSI exposure.
2–5 years of job experience in Analog Layout.
Understanding of analog layout from scratch and EM/IR analysis.
Strong teamwork, analytical and problem-solving skills in analog layout.

Responsibilities

Perform analog circuit block, subsystem and top-level layout and verification using Cadence Virtuoso (VXL).
Participate in layout design of Analog circuits (block/IP/chip) floor planning, routing and verification.
Participate layout design reviews and plan block level schedules.
Collaborate in cross-functional activities and communicate effectively.

Skills

Analog layout

VLSI exposure

Cadence Virtuoso

IR drop analysis

Parasitic reduction

Team player

Strong communication

Education

Bachelor's Degree in Electrical/Electronics Engineering or Microelectronics

Tools

Cadence Virtuoso

Job description

This role emphasizes teamwork, problem solving and communication as you plan block level schedules and contribute to cross‑functional activities in a global

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