Process Engineer

SUPERSIC (MALAYSIA) SDN. BHD.; Kepala Batas; On-site; MYR 90,000 - 130,000; Full time

Job summary

SUPERSIC (MALAYSIA) SDN. BHD. in Penang seeks a senior Process Engineer to own daily wafer fabrication logs, yield parameters and advanced machine error codes across critical SiC processing zones.

You will lead tool commissioning, establish parameter baselines, and optimize test wafer sampling. You will also spearhead data modeling and maintain electronic recipe databases.

The role requires a Master’s degree, CGPA 3.00+, and hands-on cleanroom experience; fluency in English is essential.

Qualifications

• Must hold a Master's degree in a relevant field.
• CGPA of 3.00 or higher throughout both degrees.
• Experience in wafer fab cleanroom research or automated cleanroom projects.
• Strong knowledge of material characterization and semiconductor physics.

Responsibilities

• Own and optimize process monitoring and data handling in wafer fabrication.
• Lead tool commissioning and define parameter baselines.
• Conduct advanced process characterization studies and data modeling.
• Drive 5S, safety and hygiene audits in cleanroom zones.
• Lead yield enhancement and variation reduction projects.

Skills

Material characterization

Thin-film mechanics

Fluid dynamics

Semiconductor physics

SPC

DOE

Minitab

English (fluent)

Education

Master's degree (M.Sc. or M.Eng.) in relevant field

CGPA 3.00+

Job description

Process Monitoring & Data Ownership: Own, track, and stabilize daily wafer fabrication logs, yield parameters, and advanced machine error codes across critical SiC processing zones.

Tool Commissioning & Parameter Baselines: Lead the engineering team during advanced tool commissioning, establishing rigorous parameter baselines, and optimizing test wafer sampling methodologies.

Advanced Process Characterization Studies: Spearhead the compilation and statistical modeling of complex manufacturing data for high-level process characterization studies, while structuring the electronic recipe databases.

Cleanroom Operational Discipline & Audits: Drive absolute cleanroom compliance by managing and conducting structural 5S, safety, and operational hygiene audits within critical sub‑micron processing zones.

Yield Enhancement & Variation Reduction Projects: Spearhead structured process optimization projects leveraging advanced engineering principles to systematically reduce crystalline process variation, eliminate yield excursions, and minimize material waste.

Job Requirements

Academic Qualification: MUST possess a Master's Degree (M.Sc. or M.Eng.) in Material Science, Chemical Engineering, Applied Physics, Mechatronics, Microelectronics, Electronic/Electrical Engineering, or equivalent applied science branches. (Applications without a Master’s qualification will be automatically filtered).

Academic Excellence: Maintained a continuous CGPA of 3.00 and above throughout both Bachelor’s and Master’s degree levels.

Technical Asset: Prior research or internship experience (3–6 months) inside a wafer fab cleanroom environment (e.g., thin films, polishing, crystal growth, or lithography) or an automated cleanroom thesis project is a major advantage.

Core Technical Competencies: Strong fundamental knowledge of material characterization, thin-film mechanics, fluid dynamics, or semiconductor physics. Familiarity with SPC, DOE, and Minitab is highly preferred.

Language Capabilities: Fluent and articulate command of both written and spoken English.