FPGA Prototyping & Physical AI Intern

LATTICE SEMICONDUCTOR MALAYSIA SDN. BHD.; Penang; On-site; MYR 20,000 - 25,000; Full time

Job summary

Lattice Semiconductor Malaysia invites final-year or penultimate-year students to join the Robotics & Systems Engineering team in Penang as an FPGA Prototyping & Physical AI intern. This role develops RTL design, SoC integration and AI-on-FPGA, working with prototype platforms and reference designs that feed worldwide engagements.

You will advance hardware-software co-design flows, debug across the FPGA cycle, and help automate validation.

Qualifications

• Final-year or penultimate-year student in Electrical, Electronic, Computer Systems or Computer Engineering.
• Demonstrated RTL design and verification (SystemVerilog/Verilog) and FPGA timing closure or resource analysis.
• Embedded C/C++ with DMA, interrupts and memory-mapped I/O; SoC integration with soft-core processors and RTOS is a plus.
• Exposure to ML inference deployment, model compression (quantisation, pruning) or robotics control loops is a strong plus.
• Ability to work through ambiguities and build scalable frameworks across platforms and teams.
• Outstanding communication and documentation skills; cross-site collaboration.

Responsibilities

• Design, integrate and validate RTL for prototype FPGA systems, including soft-IP integration (PCIe root port, USB host, AXI/APB interconnect), timing closure and resource optimisation on Lattice Avant and Nexus devices using Radiant and Propel.
• Develop hardware-software co-design flows for Physical AI workloads: partition vision-language-action and robot-control pipelines between host GPU and FPGA, profile latency and power, evaluate quantisation and pruning trade-offs, and validate hardware-in-the-loop on robot platforms.
• Practice efficient debug across the full FPGA development cycle: self-checking testbenches and simulation, waveform and log analysis, board bring-up, embedded firmware (RISC-V and MCU-class) and host-side software integration.
• Automate validation and bring-up: regression suites, board-farm CI, telemetry and logging tooling, and reproducible test-result reporting.
• Transform results into engineering collateral: reference designs, user guides, application notes and demo bring-up for tradeshows and customer engagements.
• Utilize AI to transform workflows into more meaningful processes and interactions.

Skills

RTL design

Verilog/SystemVerilog

C/C++

FPGA timing closure

Documentation

Education

Final-year or penultimate-year student (Electrical/Electronic/Computer Systems/Computer Engineering)

Tools

Radiant

Propel

RISC-V

Job description

LATTICE SEMICONDUCTOR MALAYSIA SDN. BHD. View all jobs

There is energy here… energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a "team first" organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.

Job Description:

Lattice Semiconductor is looking for an FPGA Prototyping & Physical AI intern for the Robotics & Systems Engineering team in Penang. This position provides the opportunity to develop technical depth across RTL design, SoC integration and AI-on-FPGA, working with the team on prototype platforms and reference designs that feed worldwide customer engagements.

Responsibilities

• Design, integrate and validate RTL for prototype FPGA systems, including soft-IP integration (PCIe root port, USB host, AXI/APB interconnect), timing closure and resource optimisation on Lattice Avant and Nexus devices using Radiant and Propel.
• Develop hardware-software co-design flows for Physical AI workloads: partition vision-language-action and robot-control pipelines between host GPU and FPGA, profile latency and power, evaluate quantisation and pruning trade-offs, and validate hardware-in-the-loop on robot platforms.
• Practice efficient debug across the full FPGA development cycle: self-checking testbenches and simulation, waveform and log analysis, board bring-up, embedded firmware (RISC-V and MCU-class) and host-side software integration.
• Automate validation and bring-up: regression suites, board-farm continuous integration, telemetry and logging tooling, and reproducible test-result reporting.
• Transform results into engineering collateral: contribute to reference designs, user guides, application notes and demo bring-up for tradeshows and customer engagements.
• Utilize AI to transform existing workflows into processes and interactions that are more meaningful and efficient.

Experience

• Final-year or penultimate-year student in Electrical, Electronic, Computer Systems or Computer Engineering. Demonstrated RTL design and verification (SystemVerilog/Verilog, FSM and datapath design, self-checking testbenches) and FPGA timing closure or resource analysis are required.
• Embedded C/C++ with DMA, interrupts and memory-mapped I/O. SoC integration with soft-core processors and an RTOS is a plus.
• Exposure to ML inference deployment, model compression (quantisation, pruning) or robotics control loops is a strong plus.
• Ability to work through ambiguities and build frameworks that scale the team to more platforms and higher-complexity integration.
• Outstanding communication and documentation skills. Excel in working across functional teams, sites and cultures.
• Availability for a 12-week placement between December 2026 and February 2027, Penang-based.

#LI-DNP

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in: Malaysia

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visitwww.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.