FPGA Prototyping & Physical AI Intern

Lattice Malaysia; Malaysia; On-site; MYR 20,000 - 30,000; Full time

Job summary

Lattice Malaysia invites final-year or penultimate-year students in Electrical, Electronic, Computer Systems or Computer Engineering to join a 12-week placement in Penang (Dec 2026–Feb 2027). You will work on RTL design, FPGA prototype validation, and hardware-software co-design for Physical AI workloads on Lattice Avant and Nexus platforms.

The role involves embedded firmware work, testbenches, debugging across the FPGA cycle, and collaboration with global teams to produce reference designs and

Qualifications

• RTL design and verification (SystemVerilog/Verilog, FSM and datapath design)
• Embedded C/C++ with DMA, interrupts and memory-mapped I/O
• SoC integration with soft-core processors and RTOS is a plus
• Exposure to ML inference deployment or robotics control loops is a plus

Responsibilities

• Design, integrate and validate RTL for FPGA prototypes and soft-IP integration
• Develop hardware-software co-design flows for Physical AI workloads and robot-control pipelines
• Debug across the FPGA development cycle: testbenches, waveform analysis, board bring-up
• Automate validation, CI, telemetry, and test reporting
• Create reference designs and application notes for customer engagements

Skills

RTL design

Verilog/SystemVerilog

FPGA timing closure

Embedded C/C++

Self-checking testbenches

SoC integration

Documentation skills

Cross-team collaboration

Education

Electrical Engineering

Electronic Engineering

Computer Systems

Computer Engineering

Tools

Radiant

Propel

RISC-V

MCU development

Job description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers.

Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry.

Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

• Design, integrate and validate RTL for prototype FPGA systems, including soft-IP integration (PCIe root port, USB host, AXI/APB interconnect), timing closure and resource optimisation on Lattice Avant and Nexus devices using Radiant and Propel.
• Develop hardware-software co-design flows for Physical AI workloads: partition vision-language-action and robot-control pipelines between host GPU and FPGA, profile latency and power, evaluate quantisation and pruning trade-offs, and validate hardware-in-the-loop on robot platforms.
• Practice efficient debug across the full FPGA development cycle: self-checking testbenches and simulation, waveform and log analysis, board bring-up, embedded firmware (RISC-V and MCU-class) and host-side software integration.
• Automate validation and bring-up: regression suites, board-farm continuous integration, telemetry and logging tooling, and reproducible test-result reporting.
• Transform results into engineering collateral: contribute to reference designs, user guides, application notes and demo bring-up for tradeshows and customer engagements.
• Utilize AI to transform existing workflows into processes and interactions that are more meaningful and efficient.

Experience:

• Final-year or penultimate-year student in Electrical, Electronic, Computer Systems or Computer Engineering.
• Demonstrated RTL design and verification (SystemVerilog/Verilog, FSM and datapath design, self-checking testbenches) and FPGA timing closure or resource analysis are required.
• Embedded C/C++ with DMA, interrupts and memory-mapped I/O.
• SoC integration with soft-core processors and an RTOS is a plus.
• Exposure to ML inference deployment, model compression (quantisation, pruning) or robotics control loops is a strong plus.
• Ability to work through ambiguities and build frameworks that scale the team to more platforms and higher-complexity integration.
• Outstanding communication and documentation skills.
• Excel in working across functional teams, sites and cultures.
• Availability for a 12-week placement between December 2026 and February 2027, Penang-based.

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in: Malaysia

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win.

For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com.

You can also follow us via Twitter, Facebook, or RSS.

At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.

Applications are welcome from all qualified candidates.

GROWTH

We foster a culture where everyone strives for continuous learning and development. We challenge ourselves to boldly deliver exceptional growth and value for customers and shareholders.

RELIABILITY

Our customers trust us to deliver, and we take that responsibility seriously. By committing ourselves to dependable supply, support, and solutions, we build strong collaboration that lasts and thrives.

EXECUTION

Innovation turns great ideas into results. Together, we create differentiated products and solutions through disciplined planning, decisiveness, and timely delivery with uncompromising quality.

ACCOUNTABILITY

We own our actions and outcomes: holding ourselves to the highest standards, agilely adapting to change, delivering on our commitments, and empowering each other to drive our success.

TRANSPARENCY

Openness builds trust. We lead with integrity and candor, facing hard facts and embracing tough conversations with clear communication, decisive action, and open honesty at every level.

Lattice is strengthening is leadership in compute, communications, industrial, and embedded markets – underscored by multiple award wins that recognize its innovation, leadership, workplace culture, and collaboration-driven solutions. Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. For over 40 years, Lattice has driven innovation in the semiconductor industry. Our compact, power-efficient field programmable gate arrays (FPGAs) are essential to building a secure, intelligent, and connected world. Lattice is the #1 supplier of small FPGAs worldwide, with the largest installed base in the industry. Our solutions are trusted by over 11,000 customers globally, spanning the compute, communications, industrial, and embedded markets. Founded in 1983 in Oregon’s Silicon Forest, Lattice has grown into a global leader with a passionate team dedicated to pushing the boundaries of programmable logic and fostering a culture of innovation.

Headquartered in Portland, Oregon with major operations in San Jose, California, Shanghai, China, and Manilla, Philippines.