CPU Validation & Reliability Engineer — On‑Site (Malaysia)

Intel; Kulim; On-site; MYR 65,000 - 95,000; Full time

Job summary

Intel in Kulim, Malaysia is seeking a CPU Validation Engineer to design, develop and execute validation strategies for next‑generation CPUs. You will perform system stress tests, automate validation flows and contribute tools to debug and optimize performance across Windows and Linux environments.

You will collaborate with architecture, design, verification, board, platform and manufacturing teams to identify root causes, perform silicon debugging, and help build post‑silicon validation

Qualifications

• Bachelor's degree in computer engineering, computer science, electronics engineering or a related field.
• English proficiency (B2+), with strong communication.
• Strong Python programming skills; knowledge of C++ or OO languages is a plus.
• Experience with Windows and Linux operating systems (Red Hat, CentOS, Ubuntu, Fedora).

Responsibilities

• Develop and execute system stress experiments for CPU validation.
• Automate stress flows controlling voltage, temperature, and frequency.
• Create and refine test tools and scripts for validation content.
• Analyze and optimize workloads in stress experiments.
• Define and execute functional validation methodologies for CPUs.
• Collaborate with architecture, design, verification, board, platform, and manufacturing teams.
• Perform silicon debug to identify root causes of failures.
• Develop and maintain post-silicon validation infrastructure and automation.

Skills

Python programming

English proficiency

C++ programming

Windows/Linux experience

Education

Bachelor's degree in computer engineering, computer science, electronics engineering or related field

Job description

Intel in Kulim, Malaysia is seeking a CPU Validation Engineer to design, develop and execute validation strategies for next‑generation CPUs. You will perform system stress tests, automate validation flows and contribute tools to debug and optimize performance across Windows and Linux environments.

You will collaborate with architecture, design, verification, board, platform and manufacturing teams to identify root causes, perform silicon debugging, and help build post‑silicon validation