SoC Infrastructure/NoC, Power & Performance Validation Engineer, Staff

QUALCOMM, Inc.; Tijuana; Presencial; MXN 800.000 - 1.200.000; Jornada completa

Descripción de la vacante

QUALCOMM, Inc. seeks an experienced engineer to advance system validation and emulation content for premium mobile and AI accelerator platforms. You will work across HW/SW boundaries to validate SOC bus architectures, performance and power in pre- and post-silicon stages.

You will design and execute performance tests, develop verification content, and produce dashboards to track KPI across product generations, contributing to silicon quality for next-gen platforms.

Formación

• BS/MS/PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 5+ years of experience in silicon validation, or platform bring-up.
• Interconnect architectures - NoCs, AXI, AHB; stress transactions for coverage.
• Proficient in C, C++, Python and assembly languages; driver/test content development.
• Experience with JTAG debuggers and kernel debuggers; complex HW/SW issue debugging.
• Ability to create performance dashboards and KPI tracking across generations.
• Strong understanding of memory hierarchy, cache coherency, and system power.

Responsabilidades

• Develop thorough performance validation plans with power-performance trade-offs.
• Write system-level test content validating SOC bandwidth, QoS, latency, throughput.
• Drive pre-silicon and post-silicon validation, emulation, and silicon performance correlation.
• Create dashboards, reports, and technical reviews for leadership and stakeholders.

Conocimientos

C

C++

Python

Embedded systems

Performance validation

Power optimization

System-level debugging

Educación

BS/MS/PhD in Electrical Engineering

Computer Engineering

Computer Science

Herramientas

JTAG debuggers

Perfmon

Emulation platforms

Debugging tools

Descripción del empleo

Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:Qualcomm’s System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre- and post-silicon phases .This role focuses on content quality and system-level validation enablement , offering deep exposure to Qualcomm SoCs through bare-metal validation content , scalable automation frameworks, and complex system debugs. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content , ensuring high-quality silicon validation across a wide range of SoC domains.Excellent Opportunity to work on cutting-edge SoCs across multiple product segments , including:Premium mobile and flagship platformsData centerAI Accelerator platformRole Overview:The team is currently seeking candidate specifically for SOC Infrastructure/NoC, Power and Performance Validation in pre-silicon emulation and post-silicon of industry-leading, next generation Premium-Tier Mobile & AI Accelerator platform. An ideal candidate is expected to have an excellent understanding of digital design fundamentals, on-chip interconnects, writing content to validate and analyze SOC bus architecture, performance and power.Roles & Responsibilities:Come up with thorough performance validation plans and work closely with team members to ensure Performance-Power trade-offs are factored inSOC Bandwidth, QoS, Latency and Throughput analysisMinimum Requirements:BS/MS/PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.5+ years of experience in silicon validation, or platform bring-up.Interconnect architectures - NoCs, AXI, AHB etc. Knowledge of upstream and downstream operations and the ability to write programs to stress their transactions for appropriate coverageSolid expertise in various FIFO designs and related performance/functionality aspectsMemory hierarchy and caches - coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full-system concurrency, MTE, MPAMThorough understanding of CPU and DDR concepts, Multimedia, GPU, PeripheralsSystem low power modes, Dynamic clock and voltage scaling operations, Interrupt architectureDebug architecture - interactions with JTAG based debuggers, state dump scriptsIn depth debugging experience for Complex HW and SW issuesExperience working with Perfmon architecture -performance counters, telemetry data, and hardware/software co-optimization.Drive correlation between pre-silicon models, emulation platforms, and silicon performance measurements.Evaluate AI inference and training workloads to ensure optimal throughput, latency, memory bandwidth, and power-performance efficiency.Contribute to methodology development for performance characterization, benchmarking, and KPI tracking across product generations.Create performance dashboards, reports, and technical reviews for leadership and cross-functional stakeholders.Experience in embedded systems/expertise in C, C++, Python and assembly languages. Design and Implementation of drivers and test contentLogical thinking and problem-solving ability with focus on Power, Performance and SoC System feature validationFundamental understanding of Static, Leakage and Dynamic power in a semiconductor designFamiliarity in debug tools including JTAG and kernel debuggersPreferred Qualification:Strong understanding of computer architecture, AI/ML accelerators, memory hierarchy, cache coherency, and on-chip interconnects.Knowledge of AI/ML workloads, tensor operations, matrix multiplication, transformer models, and large-scale inference systems.Familiarity with System level debug, silicon bring-upMinimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.ORMaster's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.ORPhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. 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