Substrate IC Package Layout Design Engineer

Only for registered members

San Jose (CA)

On-site

USD 120,000 - 180,000

Full time

30+ days ago

Job summary

An innovative firm is seeking a Substrate IC Package Layout Design Engineer to lead the design of complex IC substrate packages for high-performance AI processors. This role demands expertise in high-speed signaling and power delivery networks, with a focus on optimizing designs for performance. Join a fully in-person team that values engineering excellence and offers a collaborative environment where your contributions will directly impact cutting-edge AI hardware. If you have a passion for pushing the boundaries of what's possible in chip design, this opportunity is perfect for you.

Benefits

Full medical, dental, and vision packages

Housing subsidy of $2,000/month

Daily lunch and dinner

Relocation support

Qualifications

10+ years of experience in IC substrate layout design for high-performance processors.
Extensive experience with complex high-density layouts and power delivery networks.

Responsibilities

Lead the design of complex IC substrate layouts for high-power AI processors.
Develop high-speed signal routing solutions while minimizing integrity issues.

Skills

IC substrate layout design

High-speed signaling design

Signal integrity mitigation

Power delivery network design

CoWoS interposer design

Analytical skills

Education

Bachelor’s degree in Electrical Engineering

Master’s degree in Electrical Engineering

Tools

Allegro Package Designer

Job description

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Your role

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Your profile

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Benefits

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