Senior Digital Design Engineer

NXP Semiconductors; Milano; In loco; EUR 51.000 - 70.000; Tempo pieno

Descrizione del lavoro

NXP Semiconductors in Milan, Italy, seeks a Senior Digital IC Designer to contribute to advanced mixed-signal ICs for automotive and industrial electrification.

You will design RTL in SystemVerilog, work with architects and verification engineers, and help with timing closure, power management, and IP integration across global teams.

Candidates should have a Master's degree and at least 7 years in digital IC design, fluent English, and experience with industry-standard EDA tools.

Competenze

• Master's degree in Electrical or Electronics Engineering or equivalent is required.
• Minimum 7 years of experience in digital IC design.
• Strong experience with RTL development using SystemVerilog/Verilog.
• Experience with synthesis, timing constraints, and digital implementation flows.
• Knowledge of CDC, reset strategies, and low-power design concepts.
• Familiarity with DFT fundamentals and design-for-test methodologies.
• Experience in mixed-signal IC development environments and digital verification.

Mansioni

• Develop RTL designs for complex digital blocks and subsystems using SystemVerilog/Verilog.
• Contribute to digital architecture definition with senior designers and system architects.
• Analyze design trade-offs related to performance, power, and area.
• Implement robust clocking, reset, and power management strategies.
• Support IP integration and subsystem development.
• Perform RTL verification activities including simulation, lint, CDC, and synthesis checks.
• Collaborate with digital verification engineers to ensure coverage and quality.
• Support timing closure and implementation activities.
• Participate in design reviews and sign-off readiness.
• Assist silicon bring-up, debugging, characterization, and root cause analysis.
• Work within mixed-signal project teams with analog designers and application engineers.
• Promote reuse of digital IPs and design methodologies.

Conoscenze

RTL development

SystemVerilog/Verilog

Digital IC design

Synthesis & timing constraints

CDC & low-power design

DFT fundamentals

Digital verification methodologies

EDA tools familiarity

English fluency

Formazione

Master's degree in Electrical Engineering, Electronics Engineering, or equivalent

Strumenti

Synopsys

Cadence

Siemens EDA

Descrizione del lavoro

Senior Digital IC Designer Location: Milan, Italy – NXP Semiconductors

NXP Semiconductors is seeking a Senior Digital IC Designer to contribute to the development of advanced mixed-signal integrated circuits for automotive and industrial electrification applications. The successful candidate will play a key role in the design, implementation, and integration of digital subsystems, working closely with architects, verification engineers, and multidisciplinary development teams.

Key Responsibilities

Digital Design and Implementation

• Develop RTL designs for complex digital blocks and subsystems using SystemVerilog/Verilog.


• Contribute to digital architecture definition together with senior designers and system architects.


• Analyze design trade-offs related to performance, power consumption, area, safety, and testability.


• Implement robust clocking, reset, and power management strategies.


• Support IP integration and subsystem-level development.

Design Quality and Verification Support

• Perform RTL verification activities, including simulation, lint, CDC, and synthesis checks.


• Collaborate closely with digital verification engineers to ensure specification coverage and design quality.


• Support timing closure and implementation activities.


• Participate in design reviews and contribute to sign-off readiness.


• Support silicon bring-up, debugging, characterization, and root-cause analysis.

Mixed-Signal and Product Development Collaboration

• Work effectively within mixed-signal project teams including analog designers, verification engineers, system architects, and application engineers.


• Contribute to requirements definition and technical feasibility analysis.


• Support multiple development phases from concept through production release.


• Promote reuse of digital IPs and design methodologies.

Functional Safety and Quality

• Contribute to the implementation of safety mechanisms in compliance with automotive standards.


• Support functional safety analysis and reviews.


• Follow established development processes and quality standards for automotive and industrial products.

Team Contribution

• Provide technical support and guidance to less experienced engineers.


• Share knowledge, methodologies, and best practices within the team.


• Collaborate effectively across international R&D sites.

Required Skills

• Master's degree in Electrical Engineering, Electronics Engineering, or equivalent.


• Minimum 7 years of experience in digital IC design.


• Strong experience in RTL development using SystemVerilog/Verilog.


• Experience with synthesis, timing constraints, and digital implementation flows.


• Understanding of CDC, reset strategies, and low-power design concepts.


• Familiarity with DFT fundamentals and design-for-test methodologies.


• Experience working in mixed-signal IC development environments.


• Knowledge of digital verification methodologies and simulation-based verification.


• Experience with industry-standard EDA tools (Synopsys, Cadence, Siemens EDA).


• Fluent written and spoken English.

Preferred Qualifications

• Experience in automotive or industrial semiconductor products.


• Familiarity with automotive functional safety concepts (ISO 26262).


• Experience with electrification applications such as Battery Management Systems (BMS), High Voltage Gate Drivers, or Power Management ICs.


• Knowledge of digital signal processing techniques.


• Experience supporting first silicon bring-up and product qualification activities.


• Experience working within geographically distributed development teams.

NXP is committed to equal pay for equal work and work of equal value and applies fair, consistent and transparent remuneration practices. As of the date of this posting, the estimated gross annual base salary range for this position in Italy is between 50,600 € and 69,600 € annually. This range is intended as a guideline. Actual compensation may vary based on qualifications, experience, skills, and specific business or organizational needs. This position falls under the applicable National Collective Labour Agreement (Metalmeccanica Industria). Where relevant, the total compensation package may also include additional elements such as annual incentive opportunities and/or equity, along with a competitive benefits package. More information about NXP in Italy…

Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Please note that NXP operates under a strict Preferred Supplier List (PSL) for all recruitment activities. Any candidate profiles or resume submitted without a prior written agreement or explicit request from our Talent Acquisition team will be considered unsolicited. Such submissions will be deemed free of any obligations, and no fees will be paid by NXP or any of its affiliates, subsidiaries, or divisions - regardless of whether the candidate is hired, either coincidentally or otherwise.