Senior Design Verification Engineer

Ic Resources; Lazio; Ibrido; EUR 30.000 - 50.000; Tempo pieno

Descrizione del lavoro

A leading semiconductor organization is seeking an experienced Senior Design Verification Engineer to join their team in Rome. This role offers the chance to contribute to innovative SoC designs that will shape the future of AI and HPC. The ideal candidate will have a Master's degree and proven experience in verification methodologies, with expertise in UVM and System Verilog. The position allows for a hybrid working model. For application, contact via email.

Competenze

• Proven experience in 3 successful tapeouts.
• Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable.

Mansioni

• Contribute to game-changing semiconductor technology.
• Work with advanced SoC designs in a multicultural team.

Conoscenze

UVM

System Verilog

Scripting languages (Python, Perl, Bash)

Formal Verification

Formazione

Master's degree in a relevant field

Strumenti

NoC

PCIe

DDR

Descrizione del lavoro

Senior Design Verification Engineer - Rome

I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting‑edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.

Required Skills & Experience

• Master's degree in a relevant field.
• Proven experience in 3 successful tapeouts
• Expertise in UVM / System Verilog
• Experience with Formal Verification
• Experience with scripting languages such as Python, Perl or Bash
• Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential

This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.

Email - [e-mail]

Tel - 01189073075