Principal HS Digital Place & Route Engineer (d/m/f)

ams Italy S.r.l.

Chignolo Po

In loco

EUR 90.000 - 140.000

Tempo pieno

4 giorni fa
Candidati tra i primi
Generatore di candidature

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Descrizione del lavoro

ams OSRAM is seeking a senior technical expert in digital backend with a MSc or PhD in Electrical Engineering and 10+ years of backend design experience. The role drives PnR sign-off, mentor teams, and interfaces with foundries and EDA vendors to push advanced CMOS methodologies and flow improvements.

Candidates should demonstrate leadership across projects, in-depth knowledge of timing closure, power, SI/EM, and regression planning for high-speed interfaces, with a track record of defining

Competenze

  • MSc or PhD in Electrical Engineering, Microelectronics, or related field.
  • 10+ years of experience in digital physical implementation and backend design.
  • Proven expertise with Cadence EDA flow and other physical design tools.
  • Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis.
  • Extensive experience with timing closure and sign-off methodologies.
  • Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable.
  • Experience driving methodology development and engineering best practices across multiple projects.
  • Strong communication, collaboration, mentoring, and technical leadership skills.
  • Ability to work independently and influence technical decisions at organizational level.

Mansioni

  • Technical expert and recognized authority for physical implementation of high-speed digital and mixed-signal ICs
  • Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out
  • Define, deploy, and maintain digital backend methodologies, flows, and best practices
  • Drive timing closure, power, performance, area (PPA), signal integrity, EM/IR and physical verification strategies
  • Mentor and develop engineers within the digital backend community
  • Lead EDA tool evaluations, methodology improvements, and flow automation initiatives
  • Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI
  • Provide technical leadership across multiple projects and business units
  • Act as interface to foundries, EDA vendors, and methodology teams
  • Drive continuous improvement of backend design efficiency and quality

Conoscenze

Digital backend expertise
Technical leadership
Mentoring
Cross-functional collaboration
Independent decision-making

Formazione

MSc in Electrical Engineering
PhD in Electrical Engineering

Strumenti

Cadence EDA flow
Physical design tool suite

Descrizione del lavoro

Your tasks
  • Technical expert and recognized authority for physical implementation of high-speed digital and mixed-signal ICs
  • Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out
  • Define, deploy, and maintain digital backend methodologies, flows, and best practices
  • Drive timing closure, power, performance, area (PPA), signal integrity, EM/IR and physical verification strategies
  • Mentor and develop engineers within the digital backend community
  • Lead EDA tool evaluations, methodology improvements, and flow automation initiatives
  • Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI
  • Provide technical leadership across multiple projects and business units
  • Act as interface to foundries, EDA vendors, and methodology teams
  • Drive continuous improvement of backend design efficiency and quality
Who we are looking for
  • MSc or PhD in Electrical Engineering, Microelectronics, or related field
  • 10+ years of experience in digital physical implementation and backend design
  • Proven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred)
  • Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis
  • Extensive experience with timing closure and sign-off methodologies
  • Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable
  • Experience driving methodology development and engineering best practices across multiple projects
  • Strong communication, collaboration, mentoring, and technical leadership skills
  • Ability to work independently and influence technical decisions at organizational level

ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. xjrgpwk All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

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