Principal HS Digital Place & Route Engineer (d/m/f)

ams Italy S.r.l.; Carezzano; In loco; EUR 120.000 - 180.000; Tempo pieno

Descrizione del lavoro

ams OSRAM is seeking a technical expert in digital backend for high-speed IC implementation in Italy. You will lead place-and-route from synthesis to sign-off and tape-out, define backend methodologies, and mentor engineers across projects.

You will own timing closure, power, performance, area, and signal integrity, collaborating with foundries and EDA vendors while driving flow automation and best practices.

Competenze

• MSc or PhD in Electrical Engineering, Microelectronics, or related field.
• 10+ years of digital physical implementation and backend design.
• Proven Cadence EDA flow expertise or similar toolchain.
• Strong knowledge of PPA, timing, routing, and sign-off.
• Experience with high-speed interfaces (PCIe, USB, DDR, SerDes, MIPI) is highly desirable.

Mansioni

• Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out.
• Define, deploy, and maintain digital backend methodologies, flows, and best practices
• Drive timing closure, power, performance, and area (PPA) strategies
• Mentor and develop engineers within the digital backend community
• Lead EDA tool evaluations, methodology improvements, and flow automation initiatives
• Act as interface to foundries, EDA vendors, and methodology teams
• Drive continuous improvement of backend design efficiency and quality

Conoscenze

Leadership

Mentoring

Communication

Independence

Collaboration

Formazione

MSc or PhD in Electrical Engineering/Microelectronics

Strumenti

Cadence EDA

Descrizione del lavoro

Your tasks

• Technical expert and recognized authority for physical implementation of high-speed digital and mixed-signal ICs
• Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out
• Define, deploy, and maintain digital backend methodologies, flows, and best practices
• Drive timing closure, power, performance, area (PPA), signal integrity, EM/IR and physical verification strategies
• Mentor and develop engineers within the digital backend community
• Lead EDA tool evaluations, methodology improvements, and flow automation initiatives
• Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI
• Provide technical leadership across multiple projects and business units
• Act as interface to foundries, EDA vendors, and methodology teams
• Drive continuous improvement of backend design efficiency and quality

Who we are looking for

• MSc or PhD in Electrical Engineering, Microelectronics, or related field
• 10+ years of experience in digital physical implementation and backend design
• Proven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred)
• Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis
• Extensive experience with timing closure and sign-off methodologies
• Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable
• Experience driving methodology development and engineering best practices across multiple projects
• Strong communication, collaboration, mentoring, and technical leadership skills
• Ability to work independently and influence technical decisions at organizational level

ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will