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Principal Analog Design Engineer

Spearhead Staffing LLC

Cascina Vignazza

In loco

EUR 85.000 - 110.000

Tempo pieno

Oggi
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Descrizione del lavoro

A leading technology staffing firm is seeking a Principal Analog Design Engineer in Pavia, Italy. This key position involves designing and validating high-speed analog circuits for communication infrastructure. Ideal candidates will have 12-15 years of experience, a Master's or Ph.D. in Electrical Engineering, and proficiency in both Italian and English. The role offers a competitive salary of €85,000 to €110,000 plus bonuses, with a full-time on-site work model.

Servizi

Signing bonus
Paid relocation
Performance bonuses

Competenze

  • 12-15 years of professional experience in IC design.
  • Proven experience designing analog ICs in multi-GHz range.
  • Proficiency in both Italian and English (minimum B2 level).

Mansioni

  • Analyze and interpret block specifications for design.
  • Model and validate circuit blocks, supervise layout activities.
  • Mentor junior designers and enhance team collaboration.
  • Manage pre-silicon and post-silicon tasks effectively.

Conoscenze

IC design
Analog design
Communication skills
Team collaboration

Formazione

Master's degree or Ph.D. in Electrical Engineering

Strumenti

EDA CAD tools
Descrizione del lavoro

Principal Analog Design Engineer

Pavia, Italy

€85,000 to €110,000 + Bonus + SIGNING BONUS + Paid Relocation

This role is a key position within our Optical PHY (CE-OPHY) team , which is part of our Central Engineering division. Our team is at the forefront of designing high-speed and optical transceivers for modern communication infrastructure. This technology is critical for addressing the explosive demand for bandwidth in mega data centers that power social media, video-on-demand, gaming, and other real-time data streams. We are dedicated to developing innovative, first-to-market chips and subsystem solutions that push the boundaries of data rates and power efficiency.

Key Responsibilities
  • Design & Architecture: You will analyze and interpret block specifications, taking ownership of transistor-level design and selecting the most appropriate topologies. This role involves designing entire analog macros or IPs from initial concept to final mass production.
  • Verification & Validation: You will be responsible for modeling and validating circuit blocks. A crucial part of your role will be to supervise and guide layout activities, providing clear guidelines and conducting rigorous post-layout verifications to ensure design integrity.
  • Collaboration & Leadership: This is a highly collaborative role. You will work closely with other engineering teams to enhance existing solutions and participate in cross-functional meetings. A key expectation is to train and mentor junior designers, helping to build the team's collective expertise and technical strength.
  • Project Management: You will manage both pre-silicon tasks, such as simulation and modeling, and post-silicon tasks, including lab characterization, debugging, and correlating measurements to simulations, all the way to high-volume production.
Candidate Profile
  • Education & Experience: A Master's degree or Ph.D. in Electrical Engineering or a related field is required, along with 12-15 years of professional experience.
  • Technical Skills: You must have proven experience in designing ICs from the architecture definition phase through to lab characterization and volume production. Solid experience in analog design, preferably in the multi-GHz range, is a must. Proficiency in supervising custom analog layout, using standard EDA CAD tools, and debugging designs to correlate simulations with measurements is essential.
  • Preferred Qualifications: Experience with multi-Gbps electrical SerDes or electro-optical transceivers is highly desirable. Knowledge of advanced CMOS nodes, including FinFET, would also be a significant advantage.
  • Personal Skills: You should possess strong communication, presentation, and documentation skills. Given our international team and location, proficiency in both written and spoken Italian and English (at a minimum B2 level) is required.
  • Work Model: This is an on-site, full-time position located in Pavia, Italy.
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