Mixed Signal Design Verification Engineer (m / f / d)

Apple; Livorno; In loco; EUR 50.000 - 70.000; Tempo pieno

Descrizione del lavoro

A leading technology company is seeking an experienced engineer to join their Analog Mixed Signal Design Verification Team. The role involves developing verification test plans, designing test benches, and collaborating with various teams to ensure compliance with system requirements. Candidates should have a Master’s in Electrical Engineering and hands-on experience with mixed signal verification tools. This position is full-time based in Livorno, Italy.

Competenze

• Hands-on experience in mixed signal verification using EDA tools.
• Experience in behavioral modelling targeting analog, digital or mixed signal verification environments.
• Teammate with excellent written and verbal communication skills.

Mansioni

• Work within the Analog Mixed Signal Design Verification Team to achieve top-level mixed signal verification.
• Develop comprehensive verification test plans.
• Design and implement test benches and tools to verify target performance.

Conoscenze

Mixed signal verification

Analog and digital design background

Behavioral modelling using System Verilog

Knowledge of UVM and Assertion-Based Verification

Scripting languages (Python / Perl / TCL)

AI and ML understanding

Communication skills

Formazione

Masters in Electrical Engineering or equivalent

Descrizione del lavoro

You will work within the Analog Mixed Signal Design Verification Team with experienced Verification Engineers in order to achieve top-level mixed signal verification with the highest quality efficiency and time-to-market. You will focus on system requirements and collaborate with the architecture analog digital and software teams to ensure specification compliance and accurate functionality. You will develop comprehensive verification test plans that exploit analog digital and mixed signal verification environments to guarantee that potential issues are addressed early in the design cycle. You will design and implement test benches models at different abstraction levels high‑coverage stimulus vectors tools monitors and checkers to verify the target performance. You will follow a collaborative approach to communicate status and results to multiple subject areas in an international context and you will partner closely with CAD and verification methodology groups.

• Hands on experience in mixed signal verification using state-of-the-art EDA tools
• Analog and digital design background that supports the analysis of verification results
• Experience in behavioral modelling using System Verilog and Verilog AMS targeting analog digital or mixed signal verification environments
• Knowledge of UVM Assertion Based Verification Functional Coverage Formal Verification
• Masters in Electrical Engineering or equivalent field required
• Experienced engineers with several years of industry experience or graduates with outstanding academic results and relevant internship experiences are considered
• Knowledge of scripting languages (Python / Perl / TCL)
• Understanding of AI and ML and their potential application to verification
• Teammate with excellent written and verbal communication skills always enthusiastic to collaborate with international teams
• Apple is an equal opportunity employer that is committed to inclusion and diversity
• We take affirmative action to ensure equal opportunity for all applicants without regard to race color religion sex sexual orientation gender identity national origin disability Veteran status or other legally protected characteristics
• Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities

Key Skills

• Arabic Speaking
• Logistics Operations
• Lecturing
• Community Support
• Gynaecology & Obstetrics
• AC Maintenance

Employment Type: Full Time

Experience: years

Vacancy: 1