Design Architect Front-End M / F

STMicroelectronics; Castelletto; In loco; EUR 50.000 - 70.000; Tempo pieno

Descrizione del lavoro

A leading semiconductor company in Castelletto seeks a Junior IP Engineer intern to join their IP management team. The role involves supporting the adoption of various IPs within the SoC design process from early definition to silicon validation. Ideal candidates should have a Master's degree and be fluent in English, with strong teamwork skills. The internship offers flexible work and guidance from senior resources.

Servizi

Flexible Work

Company Canteen

Company Shuttle

Free parking

Smart Casual Dress Code

Reimbursement of expenses

Competenze

• Good university knowledge of semiconductor processes.
• Business fluent in English.
• Less than 2 years of experience.

Mansioni

• Support the adoption of different IPs within the SoC design team.
• Contribute from early definition to silicon validation.

Conoscenze

Teamwork

Problem-solving

Understanding of SoC design flow

Willingness to learn

Formazione

Master degree

Descrizione del lavoro

Overview

STMicroelectronics (STM) business supports leading edge system companies very successful in optical, wired and wireless infrastructures by providing complete design platforms and production capabilities for very high end SoC (System On Chip) / ASIC (Application Specific Integrated Circuit) in advanced FinFet Technologies (7, 5 and 3 nm nodes).

For these SoC / ASICs the availability of pre-defined functional blocks, silicon validated and complying with specific market defined standard – named “Intellectual Properties” (IP) - represents one of the smartest ways to exploit latest FinFet technologies nodes extreme integration capabilities allowing STM customers to enrich their SoC with many new functionalities enabling new markets or new products w / o affecting overall time to market and / or R&D development cost. In this complex context, STM for wireless and optical infrastructure ASIC business is expanding R&D organization opening a new position for a junior IP engineer who will be part of our IP management team.

The IP engineer supports the adoption of different IPs including CPUs, high-speed interfaces such as consumer PCIe-USB / High Speed Serdes - Ethernet / Memory interfaces (DDR, LPDDR) within the SoC / ASIC design team all the way from early definition down to silicon validation with the following activities.

Profile

Who we are looking for

• “Learn and deliver” attitude, understanding problems and deliver solutions is key;
• Strong teamwork and multicultural attitude. No solo, team matter;
• Willingness to get challenged. Our SoC are always using all the latest technologies / solutions available in the market;
• Good university knowledge of SoC design flow / semiconductor process / FW / SW.

What we offer

• International, multicultural internship in a large high tech multinational, a key player of semiconductor industry
• Opportunity to play a role in implementing a transformational change program
• Strong development opportunity to be part of various strategic and operational HR initiatives and grow your HR and PM skills
• Coaching and guidance from senior resources, interaction with HR and business colleagues, leaders, providers, in order to test and groom your leadership skills
• Flexible Work
• Reimbursement of expenses
• Company Canteen
• Company Shuttle & Free parking
• Smart Casual Dress Code

The internship will be based in our Castelletto site.

The Employment search is addressed to candidates of both genders, under Law 10.04.1991 n. 125, as amended by Legislative Decree n. 198 / 2006 which guarantees gender equality at work

Position location

Job location

Europe, Italy, Castelletto

Candidate criteria

Education level required

5 - Master degree

Experience level required

Less than 2 years

Languages

English (2- Business fluent)

Requester

Desired start date

01 / 01 / 2024