Staff Virtuoso Custom Layout CAD Engineer

Lattice Semiconductor; Pune District; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Lattice Semiconductor is seeking an experienced EDA Tools Engineer in India to support, integrate, and optimize industry-standard tools such as Cadence Virtuoso. You will develop and maintain technology collateral, automate handoffs between design tools, and drive productivity improvements across global teams.

The role requires strong scripting skills (Python, TCL, Perl) and experience with EDA flows, libraries, and verification.

Qualifications

• Experience with Cadence Virtuoso custom design environment.
• Strong scripting in Python, TCL, Perl, and Cadence SKILL.
• Familiarity with JIRA, GitHub, and Perforce.

Responsibilities

• Support, integrate, and optimize industry-standard EDA tools (Cadence Virtuoso, etc.).
• Develop and maintain technology enablement collateral (PCells, libraries).
• Automate LEF/DEF, netlist, constraints, data handoff between Virtuoso, Innovus, and tools.
• Leverage AI-assisted development to create automation scripts in Python, TCL, Perl, and Cadence SKILL.
• Debug complex issues across CAD tools, flows, libraries, and infrastructure; drive resolutions with teams and vendors.
• Evaluate EDA tools and flows; tune methodologies for performance and accuracy.
• Collaborate with design, foundry, and methodology teams to enhance design efficiency.
• Maintain CAD infrastructure, CI pipelines, and shared flow environments.
• Provide technical guidance and mentoring in a global engineering environment.

Skills

Cadence Virtuoso

Custom layout

Verification flows

Python scripting

TCL scripting

Perl scripting

Scripting: SKILL/Perl/Python/TCL

JIRA

GitHub

Perforce

LSF compute farms

Tools

JIRA

GitHub

Perforce

LSF

Job description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Key Responsibilities

• Support, integrate, and optimize i ndustry‑standard EDA tools including Cadence Virtuoso, Spectre, DRC/LVS platforms, ADE, Voltus, Quantus, Innovus, and related verification or simulation environments.
• Develop and maintain technology enablement collateral such as PCells, technology files, symbols, models, and process‑specific libraries.
• Implement and sustain automation for LEF/DEF, netlist, constraint, and data handoff between Virtuoso, Innovus, and other design tools.
• Leverage AI‑assisted development to create and enhance automation scripts in Python, TCL, Perl, and Cadence SKILL, streamlining workflows and improving designer productivity
• Debug complex issues across CAD tools, flows, libraries, and infrastructure; drive resolutions with internal teams and EDA vendors.
• Evaluate EDA tools and flow quality, t une methodologies for performance and accuracy, and introduce new capabilities aligned with roadmap needs.
• Collaborate closely with design, foundry, and methodology teams to identify automation opportunities and enhance overall design efficiency.
• Maintain and enhance CAD infrastructure, CI/automation pipelines, and shared flow environments.
• Provide technical guidance, mentoring, and high‑quality support in a global, cross‑functional engineering environment.
• Utilize workflow and version control systems such as JIRA, GitHub, Perforce, a nd compute farm tools like LSF**.**

Required Skills

• Strong hands‑on experience with Cadence Virtuoso custom design environment
• Deep understanding of custom layout and verification flows
• Proficiency in SKILL, Perl, Python, and TCL scripting
• Experience with PDK enablement, libraries, and advanced nodes
• Knowledge of Virtuoso–Innovus handoff flows
• Familiarity with JIRA, GitHub, and Perforce

Good to Have

• Signal Integrity / Power Integrity (SIPI) experience

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

India

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.