Staff Verification Engineer

MyCareernet; Bengaluru; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

MyCareernet in Bengaluru, India, seeks an experienced IP/SOC verification engineer to work with the RTL team on microarchitecture verification and ARM feature checks.

You will build new verification environments, implement strategies, and mentor junior engineers. Requires 8+ years in IP/SOC verification, SystemVerilog/Verilog with UVM, and experience writing verification and test plans plus testbench development.

Qualifications

• 8+ years of proven IP/SOC verification experience.
• Advanced proficiency in SystemVerilog and Verilog with deep knowledge of UVM.
• Experience writing verification plans and test plans.
• Experience with Testbench development using standard verification methodologies.
• Experience with Perl, Python or other scripting languages.

Responsibilities

• Collaborate closely with the RTL team in different geography to understand microarchitecture details.
• Develop new verification environments and enhance existing ones, including stimulus generators and checkers.
• Verify new ARM architecture features function as specified and ensure no impact on existing functionality.
• Implement verification strategies in partnership with other verification engineers.
• Contribute to continuous improvement in verification methodology based on learnings.
• Mentor early-tenure verification engineers.

Skills

SystemVerilog

Verilog

UVM

Verification planning

Testbench development

Perl/Python

Collaborative skills

Education

Bachelor's degree in Engineering

Tools

ARM CoreSight IP

AMBA protocols

Job description

• Collaborate closely with the RTL team in different Geography, to understand microarchitecture details
• Develop new verification environments and enhance existing verification environments, including stimulus generators, and checkers
• Verify new ARM architecture features function as specified and do not impact existing functionality
• Implement verification strategies in partnership with other verification engineers
• Contribute to continuous improvement in verification methodology based on learnings
• Mentor early-tenure verification engineers

Skills Required:

• More than 8 years of proven experience in an IP/SOC verification
• Advanced proficiency in System Verilog and Verilog, with deep knowledge of UVM Methodology.
• Experience writing verification plan and test plan.
• Experience with Testbench development using any standard verification methodology
• Experience with Perl, Python or other scripting language
• Strong interpersonal skills to collaborate with multi-functional and geographically distributed teams to accomplish tasks

Nice to Have

• Experience with AMBA protocols (CHI, AXI, AHB, APB, ATB), JTAG/SW/TAP.
• Hands-on experience with Arm CoreSight IP and debug/trace architectures.
• Experience with ARM-based designs and/or ARM System Architectures

Education: Bachelor's degree in Engineering