IP Verification Engineer

LeadSoc Technologies Pvt Ltd; Bengaluru; On-site; INR 1,500,000 - 2,100,000; Full time

Job summary

LeadSoc Technologies Pvt Ltd is seeking an experienced IP Verification Engineer to drive verification of ARM CPU subsystems and coherent interconnect architectures. You will focus on CHI coherency, ARM subsystems, and bring-up support across debug tasks.

The role requires strong SystemVerilog/UVM testbench development, assertion creation, and functional coverage to ensure robust IP verification from RTL to silicon. You will collaborate with cross-functional teams to triage issues.

Qualifications

• 5–10 years of hands-on IP/Sub-System verification experience.
• Strong experience with ARM CPU subsystem verification.
• Deep understanding of AMBA CHI and coherency concepts.
• Experience debugging CPU/interconnect/coherency issues.
• Exposure to ARM subsystem integration, bring-up, emulation or silicon debug.

Responsibilities

• Develop and execute verification strategies for ARM CPU Subsystem IPs.
• Verify AMBA CHI coherency and interconnect protocols.
• Develop SystemVerilog/UVM testbenches, sequences, assertions, and coverage.
• Validate cache coherency, ordering, snoop transactions, and data integrity.
• Debug CPU subsystem, interconnect, and coherency failures across sim and emulation.
• Support ARM subsystem bring-up, integration, and post-silicon debug.
• Drive regression, coverage closure, and root-cause analysis.
• Collaborate with RTL, Architecture, Firmware, Emulation, and Silicon teams.

Skills

ARM CPUSS Verification

AMBA CHI

Coherency & Interconnect

SystemVerilog

UVM

Cache Coherency

Assertions

Functional Coverage

Subsystem Debug & Bring-up

Job description

We are looking for an experienced IP Verification Engineer to drive verification of ARM CPU subsystems and coherent interconnect architectures, with strong expertise in CHI coherency protocols and ARM subsystem debug/bring-up.

Key Responsibilities

• Develop and execute verification strategies for ARM CPU Subsystem (CPUSS) IPs.
• Verify AMBA CHI coherency and interconnect protocols, including functional and corner-case scenarios.
• Develop SystemVerilog/UVM testbenches, sequences, assertions, and functional coverage.
• Validate cache coherency, ordering, snoop transactions, data consistency, and error scenarios.
• Debug complex CPU subsystem, interconnect, and coherency failures across simulation and emulation.
• Support ARM subsystem bring-up, integration, and post-silicon debug.
• Drive regression, coverage closure, failure triage, and root-cause analysis.
• Collaborate with RTL, Architecture, Firmware, Emulation, and Silicon teams.

Core Technical Expertise

ARM CPUSS Verification | AMBA CHI | Coherency & Interconnect | SystemVerilog | UVM | Cache Coherency | Assertions | Functional Coverage | Subsystem Debug & Bring-up

Required Qualifications

• 5–10 years of hands-on IP/Sub-System verification experience.
• Strong experience with ARM CPU subsystem verification.
• Deep understanding of AMBA CHI and coherency concepts.
• Experience debugging complex CPU/interconnect/coherency issues.
• Exposure to ARM subsystem integration, bring-up, emulation or silicon debug.

Preferred

• Experience with ARMv8/v9-based systems.
• Knowledge of ACE/AXI, cache hierarchy, snoop mechanisms, and memory ordering.
• Experience with simulation/emulation platforms and protocol checkers.