Sr Engineer/ Lead Hardware Design

Keka Inc.; Bengaluru; On-site; INR 3,000,000 - 5,200,000; Full time

Job summary

Keka Inc. in Bengaluru seeks a Lead High-Speed Digital Design Engineer to own the full hardware lifecycle from schematic architecture to lab bring-up.

You will guide layout resources, set design workflows, and serve as the core interface for engineering teams and clients. Key responsibilities include designing multi-layer PCBs around ARM multicore SoCs, implementing LPDDR4/5, PCIe Gen 4, USB interfaces, and integrating RF front-end co-existence.

Qualifications

• Bachelor’s or Master’s degree in Electrical, Electronics or Computer Engineering.
• 4–8 years of proven high-speed digital board design experience.
• Hands-on with EMI/EMC requirements and lab bring-up.
• Experience with ARM-based multicore SoCs and high-speed interfaces.

Responsibilities

• Design multi-layer PCBs around high-performance ARM-based SoCs and PMICs.
• Implement high-speed interfaces such as LPDDR4/5, PCIe Gen 4, USB 3.2/4.0.
• Lead layout oversight, design workflows and hardware bring-up.
• Perform PoR, PDN, and decoupling analyses to optimize power delivery.
• Run SI/PI simulations to mitigate crosstalk and jitter.
• Ensure EMI/EMC compliance and thermal validation.
• Coordinate with engineering teams and clients on design decisions.

Skills

High-speed design

ARM multicore SoC

PDN analysis

Lab bring-up

EMI/EMC principles

Education

Bachelor’s or Master’s in Electrical/Electronics/Computer Engineering

Tools

Cadence Allegro

Altium Designer

Mentor Xpedition

Job description

We are seeking a Lead High-Speed Digital Design Engineer to drive the technical execution of our next-generation hardware platforms. In this role, you will take ownership of the full product lifecycle—from schematic architecture and power/reset analysis to SI/PI simulation, layout guidance, and lab bring-up. You will guide layout resources, establish design workflows, and act as the core technical interface for engineering teams and clients.

Key Responsibilities

Hardware Design & Architecture

• Design multi-layer PCBs around high-performance ARM-based Multicore SoCs, RFSOC/FPGA and complex PMIC architectures.
• Implement high-speed interfaces: LPDDR4/5, PCIe Gen 4, USB 3.2/4.0, Camera & Display interfaces and 1G/10G/100G Ethernet .
• Integrate wireless systems: Wi-Fi 6E/7 and Bluetooth (BT) with RF front-end co-existence routing.

Analysis & Simulation

• Model Power-On Reset (PoR) topologies, rail ramp rates, and low-power state transitions.
• Perform comprehensive PDN analysis to optimize plane shapes, target impedance profiles, and multi-rail DC IR drops.
• Execute detailed Decoupling analysis to determine optimal bulk and ceramic capacitor counts, values, sizing, and cavity placement.
• Run SI/PI simulations using any of Ansys HFSS/SIwave, Cadence Sigrity, or Keysight ADS to mitigate crosstalk, reflection, and jitter.

Layout Oversight & Material Trade-offs

• Select ultra-low-loss materials (e.g., Megtron, Isola, Rogers, FR4 ) and define advanced PCB stack-ups.
• Enforce HDI rules for stacked/staggered microvias, trace width geometries, and capacitor mounting pad/via loops.
• Set layout constraints for memory topologies, 1G/10G/100G Ethernet differential targets , and RF via shielding.

Compliance, EMI/EMC & Thermal Engineering

• Design for EMI/EMC mitigation from day one, minimizing radiated/conducted emissions and ensuring high immunity.
• Own compliance testing for regulatory certifications including FCC, CE etc.. at external test labs.
• Validate thermal stability by evaluating board-level power dissipation, checking component junction temperatures, and collaborating on heatsink/thermal interface material (TIM) placement.

Debug, Lab Bring-up , Performance testing & Documentation

• Hardware Bring up, Isolate hardware faults using oscilloscopes, VNAs, and logic analyzers.
• Coordinate board reworks and execute root-cause analysis (RCA) on prototype failures.
• Author technical specs, layout constraint logs, bring-up guides, and hardware errata trackers.
• Performance testing and characterization of interfaces /peripherals
• Lead and guide layout and simulation engineers to ensure strict design compliance.
• Establish design workflows, hardware checklists, and rigorous peer review gates.
• Scope customer requirements, translate use cases into engineering specs, and present technical trade-offs.

Required Technical Skills

• Experience:4 to 8 years of proven experience in high-speed digital board design and architecture.
• Processor Expertise: Practical experience with high-performance ARM-based Multicore SoC architectures.
• EDA Tools: High proficiency in Cadence Allegro, Altium Designer, or Mentor Graphics Xpedition.
• Regulatory Knowledge: Hands-on experience with EMI/EMC chamber troubleshooting and FCC/CE certification requirements.
• Education: Bachelor’s or Master’s degree in Electrical, Electronics, or Computer Engineering.