Sr. Design Engineer / Assistant Manager - Radar Signal Processing (JD#RSP01)

Larsen & Toubro; Kurla; Vor Ort; INR 1.500.000 - 3.000.000; Vollzeit

Zusammenfassung

Larsen & Toubro seeks a Radar Firmware/FPGA Engineer to develop signal processing algorithms and firmware for radar interfaces. You will work hands-on with embedded hardware and FPGA-based designs.

You will contribute to radar subsystem integration, high-speed interfaces, and toolchains including Vivado, Vitis, and Cadence. Strong C/C++, HDL, and Matlab skills are essential; prior RF/ADC/DAC exposure is a plus.

Qualifikationen

• 3+ years of firmware design / FPGA / DSP experience in radar applications.
• Proficient in VHDL/Verilog and C/C++.
• Hands-on with Vivado FPGA tools and RF interfaces.

Aufgaben

• Algorithm development, simulation & implementation using Vivado / Matlab / Python.
• Radar Subsystem integration & testing.
• Embedded Hardware & Firmware development using FPGA / DSP / Microcontroller.
• High-speed ADC, DAC, DDR, 1G/10G Ethernet and other peripheral interface designs with FPGA.
• Hands-on experience on FPGA design tools (Vivado, Vitis HLS, System Generator) and PCB/Schematic design tools (Cadence, Allegro PCB Editor).
• Knowledge of various communication protocols (Ethernet, Serial, CAN, VME, VPX etc.)

Kenntnisse

VHDL / Verilog

C/C++ Programming

Radar Signal Processing

Matlab

Vivado FPGA tools

FPGA / DSP / Microcontroller

RF-ADC/DAC

Python

Tools

Vivado

Vitis HLS

System Generator

Cadence

Allegro PCB Editor

Jobbeschreibung

Job Profile

Required to work on development and implementation of signal processing algorithms, firmware development for various interfaces in Radar. Should have hands-on experience in handling the Embedded Hardware and Firmware designs.

Job Profile

Required to work on development and implementation of signal processing algorithms, firmware development for various interfaces in Radar. Should have hands-on experience in handling the Embedded Hardware and Firmware designs.

Responsibilities

• Algorithm development, simulation & implementation using Vivado / Matlab / Python.
• Radar Subsystem integration & testing.
• Embedded Hardware & Firmware development using FPGA / DSP / Microcontroller.
• High-speed ADC, DAC, DDR, 1G/10G Ethernet and other peripheral interface designs with FPGA.
• Hands-on experience on FPGA design tools (Vivado, Vitis HLS, System Generator) and PCB/Schematic design tools (Cadence, Allegro PCB Editor).
• Knowledge of various communication protocols (Ethernet, Serial, CAN, VME, VPX etc.)

Experience & Skills

• 3+ years of experience in firmware design / FPGA / DSP, with a focus on Radar applications
• Programming languages: VHDL / Verilog, C/C++ Programming
• Radar Signal Processing, Matlab, Hands-on experience on Vivado FPGA tools.
• Experience on RF-ADC/DAC, RFSoC interfaces, Python are desirable.