SoC Front End Design Engr

NXP Semiconductors; Dadri; On-site; INR 800,000 - 1,200,000; Full time

Job summary

NXP Semiconductors is seeking a SoC Front End Design Engineer in Noida, India. This role involves designing and developing complex System-on-Chip architectures for automotive and IoT products. Candidates should have 4-7 years of experience in SoC Front End Design, proficiency in RTL design using Verilog/SystemVerilog, and familiarity with EDA tools. The position requires strong problem-solving skills and the ability to work independently and within a team. This is a full-time opportunity posted over 30 days ago.

Qualifications

• 4-7 years of experience in SoC Front End Design.
• Hands-on experience with digital design methodologies.
• Knowledge of UVM/OVM methodologies is a plus.

Responsibilities

• Participate in architectural definition and development of SoC blocks.
• Conduct design verification activities including simulation and debugging.
• Collaborate with teams to define test plans and resolve design issues.

Skills

RTL design using Verilog/SystemVerilog

Digital design fundamentals

Problem-solving skills

Familiarity with scripting languages

Education

Bachelor's or Master's degree in Electrical or Electronics Engineering

Tools

EDA tools for simulation and synthesis

Job description

## SoC Front End Design EngrApplylocations: Noidatime type: Full timeposted on: Posted 30+ Days Agojob requisition id: R-10060587SoC Front End Design Engineer Company:\*\* NXP India Pvt. Ltd. - Noida --- Job Summary We are seeking a highly motivated and skilled SoC Front End Design Engineer to join our dynamic team in Noida. This role involves contributing to the design and development of complex System-on-Chip (SoC) architectures, ensuring high-quality and high-performance solutions for next-generation automotive and IoT products. --- Responsibilities \* Participate in the architectural definition and micro-architecture development of SoC blocks and sub-systems. \* Perform RTL design and coding (Verilog/SystemVerilog) for various digital blocks, ensuring adherence to design specifications and best practices. \* Conduct extensive design verification activities, including testbench development, simulation, and debugging, to achieve functional correctness. \* Collaborate with verification engineers to define test plans, coverage goals, and resolve design issues. \* Execute and analyze various front-end design flows, including linting, CDC (Clock Domain Crossing), RDC (Reset Domain Crossing), and formal verification. \* Perform synthesis and timing analysis (STA) to meet performance targets and ensure timing closure. \* Work closely with backend teams during physical design implementation and post-layout verification. \* Contribute to documentation of design specifications, micro-architecture, and verification plans. \* Participate in design reviews and provide technical feedback. \* Identify and implement opportunities for design optimization in terms of area, power, and performance. --- Qualifications \* Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field. \* 4-7 years of experience in SoC Front End Design. \* Strong proficiency in RTL design using Verilog/SystemVerilog. \* Solid understanding of digital design fundamentals, computer architecture, and SoC design methodologies. \* Hands-on experience with industry-standard EDA tools for simulation, synthesis, linting, CDC, and STA. \* Familiarity with scripting languages such as Perl, Python, or Tcl. \* Knowledge of UVM/OVM methodologies is a plus. \* Experience with low-power design techniques is desirable. \* Excellent problem-solving, analytical, and debugging skills. \* Strong communication and interpersonal skills, with the ability to work effectively in a team environment. \* Ability to work independently and manage multiple tasks in a fast-paced environment.